Commit e5abd12f authored by Jakub Kicinski's avatar Jakub Kicinski
Browse files


Cross-merge networking fixes after downstream PR.

Conflicts:

drivers/net/ethernet/broadcom/bnxt/bnxt.c
  f7ce5eb2 ("bnxt_en: Fix crash in bnxt_get_max_rss_ctx_ring()")
  20c8ad72 ("eth: bnxt: use the RSS context XArray instead of the local list")

Adjacent changes:

net/ethtool/ioctl.c
  503757c8 ("net: ethtool: Fix RSS setting")
  eac9122f ("net: ethtool: record custom RSS contexts in the XArray")

Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parents 75fd6079 528dd46d
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+1 −1
Original line number Diff line number Diff line
@@ -66,7 +66,6 @@ allOf:
        compatible:
          contains:
            enum:
              - qcom,qdu1000-llcc
              - qcom,sc7180-llcc
              - qcom,sm6350-llcc
    then:
@@ -104,6 +103,7 @@ allOf:
        compatible:
          contains:
            enum:
              - qcom,qdu1000-llcc
              - qcom,sc8180x-llcc
              - qcom,sc8280xp-llcc
              - qcom,x1e80100-llcc
+9 −4
Original line number Diff line number Diff line
@@ -2892,7 +2892,7 @@ F: drivers/edac/altera_edac.[ch]
ARM/SPREADTRUM SoC SUPPORT
M:	Orson Zhai <orsonzhai@gmail.com>
M:	Baolin Wang <baolin.wang7@gmail.com>
M:	Chunyan Zhang <zhang.lyra@gmail.com>
R:	Chunyan Zhang <zhang.lyra@gmail.com>
S:	Maintained
F:	arch/arm64/boot/dts/sprd
N:	sprd
@@ -8833,6 +8833,7 @@ F: drivers/spi/spi-fsl-qspi.c
FREESCALE QUICC ENGINE LIBRARY
M:	Qiang Zhao <qiang.zhao@nxp.com>
M:	Christophe Leroy <christophe.leroy@csgroup.eu>
L:	linuxppc-dev@lists.ozlabs.org
S:	Maintained
F:	drivers/soc/fsl/qe/
@@ -8882,9 +8883,10 @@ S: Maintained
F:	drivers/tty/serial/ucc_uart.c
FREESCALE SOC DRIVERS
M:	Christophe Leroy <christophe.leroy@csgroup.eu>
L:	linuxppc-dev@lists.ozlabs.org
L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
S:	Orphan
S:	Maintained
F:	Documentation/devicetree/bindings/misc/fsl,dpaa2-console.yaml
F:	Documentation/devicetree/bindings/soc/fsl/
F:	drivers/soc/fsl/
@@ -16447,7 +16449,7 @@ F: arch/arm/boot/dts/ti/omap/am335x-nano.dts
OMAP1 SUPPORT
M:	Aaro Koskinen <aaro.koskinen@iki.fi>
M:	Janusz Krzysztofik <jmkrzyszt@gmail.com>
M:	Tony Lindgren <tony@atomide.com>
R:	Tony Lindgren <tony@atomide.com>
L:	linux-omap@vger.kernel.org
S:	Maintained
Q:	http://patchwork.kernel.org/project/linux-omap/list/
@@ -16459,10 +16461,13 @@ F: include/linux/platform_data/ams-delta-fiq.h
F:	include/linux/platform_data/i2c-omap.h
OMAP2+ SUPPORT
M:	Aaro Koskinen <aaro.koskinen@iki.fi>
M:	Andreas Kemnade <andreas@kemnade.info>
M:	Kevin Hilman <khilman@baylibre.com>
M:	Roger Quadros <rogerq@kernel.org>
M:	Tony Lindgren <tony@atomide.com>
L:	linux-omap@vger.kernel.org
S:	Maintained
W:	http://www.muru.com/linux/omap/
W:	http://linux.omap.com/
Q:	http://patchwork.kernel.org/project/linux-omap/list/
T:	git git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap.git
+1 −1
Original line number Diff line number Diff line
@@ -61,7 +61,7 @@ static void davinci_pm_suspend(void)

	/* Configure sleep count in deep sleep register */
	val = __raw_readl(pm_config.deepsleep_reg);
	val &= ~DEEPSLEEP_SLEEPCOUNT_MASK,
	val &= ~DEEPSLEEP_SLEEPCOUNT_MASK;
	val |= pm_config.sleepcount;
	__raw_writel(val, pm_config.deepsleep_reg);

+1 −1
Original line number Diff line number Diff line
@@ -191,7 +191,7 @@ axp803: pmic@3a3 {
		compatible = "x-powers,axp803";
		reg = <0x3a3>;
		interrupt-parent = <&r_intc>;
		interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_LOW>;
		interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_LOW>;
		x-powers,drive-vbus-en;

		vin1-supply = <&reg_vcc5v>;
+15 −1
Original line number Diff line number Diff line
@@ -1459,9 +1459,23 @@ gem_noc: interconnect@19100000 {

		system-cache-controller@19200000 {
			compatible = "qcom,qdu1000-llcc";
			reg = <0 0x19200000 0 0xd80000>,
			reg = <0 0x19200000 0 0x80000>,
			      <0 0x19300000 0 0x80000>,
			      <0 0x19600000 0 0x80000>,
			      <0 0x19700000 0 0x80000>,
			      <0 0x19a00000 0 0x80000>,
			      <0 0x19b00000 0 0x80000>,
			      <0 0x19e00000 0 0x80000>,
			      <0 0x19f00000 0 0x80000>,
			      <0 0x1a200000 0 0x80000>;
			reg-names = "llcc0_base",
				    "llcc1_base",
				    "llcc2_base",
				    "llcc3_base",
				    "llcc4_base",
				    "llcc5_base",
				    "llcc6_base",
				    "llcc7_base",
				    "llcc_broadcast_base";
			interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
		};
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