Commit e83e3c55 authored by Michal Simek's avatar Michal Simek
Browse files

dt-bindings: firmware: xilinx: Sort node names (clock-controller) 



Nodes should be sorted that's why move clock-controller to the top of list.

Acked-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/ccb6bd5f4d1d28983c73497ada596e893fece499.1703161663.git.michal.simek@amd.com


Signed-off-by: default avatarMichal Simek <michal.simek@amd.com>
parent 6f9c4e69

Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.yaml

+9 −9
Original line number Diff line number Diff line
@@ -47,6 +47,15 @@ properties: 
  "#power-domain-cells":

    const: 1



  clock-controller:

    $ref: /schemas/clock/xlnx,versal-clk.yaml#

    description: The clock controller is a hardware block of Xilinx versal

      clock tree. It reads required input clock frequencies from the devicetree

      and acts as clock provider for all clock consumers of PS clocks.list of

      clock specifiers which are external input clocks to the given clock

      controller.

    type: object



  gpio:

    $ref: /schemas/gpio/xlnx,zynqmp-gpio-modepin.yaml#

    description: The gpio node describes connect to PS_MODE pins via firmware
@@ -90,15 +99,6 @@ properties: 
      vector.

    type: object



  clock-controller:

    $ref: /schemas/clock/xlnx,versal-clk.yaml#

    description: The clock controller is a hardware block of Xilinx versal

      clock tree. It reads required input clock frequencies from the devicetree

      and acts as clock provider for all clock consumers of PS clocks.list of

      clock specifiers which are external input clocks to the given clock

      controller.

    type: object



required:

  - compatible