Commit ea920b50 authored by Jeremy Linton's avatar Jeremy Linton Committed by Will Deacon
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arm64: uaccess: Move existing GCS accessors definitions to gcs.h 



We are going to add some additional GCS access helpers to gcs.h in
order to avoid some forward reference problems with uaccess.

In preparation for that, lets move the existing gcssttr() and
put_user_gcs() routines into gcs.h where it makes sense to keep all
the accessors together. Further, the code which uses them already
includes gcs.h and there is an existing CONFIG_ARM64_GCS check we can
reuse. The GCSSTTR instruction description comment is corrected during
the move.

Signed-off-by: default avatarJeremy Linton <jeremy.linton@arm.com>
Reviewed-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
Reviewed-by: default avatarMark Brown <broonie@kernel.org>
Signed-off-by: default avatarWill Deacon <will@kernel.org>
parent 47687aa4

arch/arm64/include/asm/gcs.h

+36 −1
Original line number Diff line number Diff line
@@ -21,7 +21,7 @@ static inline void gcsstr(u64 *addr, u64 val) 
	register u64 *_addr __asm__ ("x0") = addr;

	register long _val __asm__ ("x1") = val;



	/* GCSSTTR x1, x0 */

	/* GCSSTTR x1, [x0] */

	asm volatile(

		".inst 0xd91f1c01\n"

		:
@@ -81,6 +81,41 @@ static inline int gcs_check_locked(struct task_struct *task, 
	return 0;

}



static inline int gcssttr(unsigned long __user *addr, unsigned long val)

{

	register unsigned long __user *_addr __asm__ ("x0") = addr;

	register unsigned long _val __asm__ ("x1") = val;

	int err = 0;



	/* GCSSTTR x1, [x0] */

	asm volatile(

		"1: .inst 0xd91f1c01\n"

		"2: \n"

		_ASM_EXTABLE_UACCESS_ERR(1b, 2b, %w0)

		: "+r" (err)

		: "rZ" (_val), "r" (_addr)

		: "memory");



	return err;

}



static inline void put_user_gcs(unsigned long val, unsigned long __user *addr,

				int *err)

{

	int ret;



	if (!access_ok((char __user *)addr, sizeof(u64))) {

		*err = -EFAULT;

		return;

	}



	uaccess_ttbr0_enable();

	ret = gcssttr(addr, val);

	if (ret != 0)

		*err = ret;

	uaccess_ttbr0_disable();

}



#else



static inline bool task_gcs_el0_enabled(struct task_struct *task)

arch/arm64/include/asm/uaccess.h

+0 −40
Original line number Diff line number Diff line
@@ -502,44 +502,4 @@ static inline size_t probe_subpage_writeable(const char __user *uaddr, 


#endif /* CONFIG_ARCH_HAS_SUBPAGE_FAULTS */



#ifdef CONFIG_ARM64_GCS



static inline int gcssttr(unsigned long __user *addr, unsigned long val)

{

	register unsigned long __user *_addr __asm__ ("x0") = addr;

	register unsigned long _val __asm__ ("x1") = val;

	int err = 0;



	/* GCSSTTR x1, x0 */

	asm volatile(

		"1: .inst 0xd91f1c01\n"

		"2: \n"

		_ASM_EXTABLE_UACCESS_ERR(1b, 2b, %w0)

		: "+r" (err)

		: "rZ" (_val), "r" (_addr)

		: "memory");



	return err;

}



static inline void put_user_gcs(unsigned long val, unsigned long __user *addr,

				int *err)

{

	int ret;



	if (!access_ok((char __user *)addr, sizeof(u64))) {

		*err = -EFAULT;

		return;

	}



	uaccess_ttbr0_enable();

	ret = gcssttr(addr, val);

	if (ret != 0)

		*err = ret;

	uaccess_ttbr0_disable();

}





#endif /* CONFIG_ARM64_GCS */



#endif /* __ASM_UACCESS_H */