Commit ebfc2fd8 authored by Bjorn Helgaas's avatar Bjorn Helgaas Committed by Vineet Gupta
Browse files

ARC: Fix typos



Fix typos, most reported by "codespell arch/arc".  Only touches comments,
no code changes.

Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
Signed-off-by: default avatarVineet Gupta <vgupta@kernel.org>
parent d5272aaa
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# SPDX-License-Identifier: GPL-2.0

# uImage build relies on mkimage being availble on your host for ARC target
# uImage build relies on mkimage being available on your host for ARC target
# You will need to build u-boot for ARC, rename mkimage to arc-elf32-mkimage
# and make sure it's reacable from your PATH
# and make sure it's reachable from your PATH

OBJCOPYFLAGS= -O binary -R .note -R .note.gnu.build-id -R .comment -S

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@@ -119,9 +119,9 @@ mmc@15000 {
	/*
	 * The DW APB ICTL intc on MB is connected to CPU intc via a
	 * DT "invisible" DW APB GPIO block, configured to simply pass thru
	 * interrupts - setup accordinly in platform init (plat-axs10x/ax10x.c)
	 * interrupts - setup accordingly in platform init (plat-axs10x/ax10x.c)
	 *
	 * So here we mimic a direct connection betwen them, ignoring the
	 * So here we mimic a direct connection between them, ignoring the
	 * ABPG GPIO. Thus set "interrupts = <24>" (DW APB GPIO to core)
	 * instead of "interrupts = <12>" (DW APB ICTL to DW APB GPIO)
	 *
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@@ -113,7 +113,7 @@ mmc@15000 {
	/*
	 * Embedded Vision subsystem UIO mappings; only relevant for EV VDK
	 *
	 * This node is intentionally put outside of MB above becase
	 * This node is intentionally put outside of MB above because
	 * it maps areas outside of MB's 0xez-0xfz.
	 */
	uio_ev: uio@d0000000 {
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@@ -12,7 +12,7 @@
/*
 * DSP-related saved registers - need to be saved only when you are
 * scheduled out.
 * structure fields name must correspond to aux register defenitions for
 * structure fields name must correspond to aux register definitions for
 * automatic offset calculation in DSP_AUX_SAVE_RESTORE macros
 */
struct dsp_callee_regs {
+5 −5
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@@ -7,7 +7,7 @@
 *  Stack switching code can no longer reliably rely on the fact that
 *  if we are NOT in user mode, stack is switched to kernel mode.
 *  e.g. L2 IRQ interrupted a L1 ISR which had not yet completed
 *  it's prologue including stack switching from user mode
 *  its prologue including stack switching from user mode
 *
 * Vineetg: Aug 28th 2008: Bug #94984
 *  -Zero Overhead Loop Context shd be cleared when entering IRQ/EXcp/Trap
@@ -143,7 +143,7 @@
	 * 2. L1 IRQ taken, ISR starts (CPU auto-switched to KERNEL mode)
	 * 3. But before it could switch SP from USER to KERNEL stack
	 *      a L2 IRQ "Interrupts" L1
	 * Thay way although L2 IRQ happened in Kernel mode, stack is still
	 * That way although L2 IRQ happened in Kernel mode, stack is still
	 * not switched.
	 * To handle this, we may need to switch stack even if in kernel mode
	 * provided SP has values in range of USER mode stack ( < 0x7000_0000 )
@@ -173,7 +173,7 @@

	GET_CURR_TASK_ON_CPU   r9

	/* With current tsk in r9, get it's kernel mode stack base */
	/* With current tsk in r9, get its kernel mode stack base */
	GET_TSK_STACK_BASE  r9, r9

	/* save U mode SP @ pt_regs->sp */
@@ -282,7 +282,7 @@
 * NOTE:
 *
 * It is recommended that lp_count/ilink1/ilink2 not be used as a dest reg
 * for memory load operations. If used in that way interrupts are deffered
 * for memory load operations. If used in that way interrupts are deferred
 * by hardware and that is not good.
 *-------------------------------------------------------------*/
.macro EXCEPTION_EPILOGUE
@@ -350,7 +350,7 @@
 * NOTE:
 *
 * It is recommended that lp_count/ilink1/ilink2 not be used as a dest reg
 * for memory load operations. If used in that way interrupts are deffered
 * for memory load operations. If used in that way interrupts are deferred
 * by hardware and that is not good.
 *-------------------------------------------------------------*/
.macro INTERRUPT_EPILOGUE  LVL
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