Commit f2c1b5c1 authored by Huang Rui's avatar Huang Rui Committed by Alex Deucher
Browse files

drm/amdgpu: abstract set_vm_fault_masks function to refine the programming 



This patch is to add set_vm_fault_masks helper to amdgpu_gmc to refine the
original programming.

Signed-off-by: default avatarHuang Rui <ray.huang@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 5befb6fc

drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c

+20 −0
Original line number Diff line number Diff line
@@ -411,3 +411,23 @@ void amdgpu_gmc_tmz_set(struct amdgpu_device *adev) 
		break;

	}

}



void amdgpu_gmc_set_vm_fault_masks(struct amdgpu_device *adev, int hub_type,

				   bool enable)

{

	struct amdgpu_vmhub *hub;

	u32 tmp, reg, i;



	hub = &adev->vmhub[hub_type];

	for (i = 0; i < 16; i++) {

		reg = hub->vm_context0_cntl + hub->ctx_distance * i;



		tmp = RREG32(reg);

		if (enable)

			tmp |= hub->vm_cntx_cntl_vm_fault;

		else

			tmp &= ~hub->vm_cntx_cntl_vm_fault;



		WREG32(reg, tmp);

	}

}

drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h

+4 −0
Original line number Diff line number Diff line
@@ -291,4 +291,8 @@ int amdgpu_gmc_allocate_vm_inv_eng(struct amdgpu_device *adev); 


extern void amdgpu_gmc_tmz_set(struct amdgpu_device *adev);



extern void

amdgpu_gmc_set_vm_fault_masks(struct amdgpu_device *adev, int hub_type,

			      bool enable);



#endif

drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c

+4 −49
Original line number Diff line number Diff line
@@ -62,63 +62,18 @@ gmc_v10_0_vm_fault_interrupt_state(struct amdgpu_device *adev, 
				   struct amdgpu_irq_src *src, unsigned type,

				   enum amdgpu_interrupt_state state)

{

	struct amdgpu_vmhub *hub;

	u32 tmp, reg, bits[AMDGPU_MAX_VMHUBS], i;



	bits[AMDGPU_GFXHUB_0] = GCVM_CONTEXT1_CNTL__RANGE_PROTECTION_FAULT_ENABLE_INTERRUPT_MASK |

		GCVM_CONTEXT1_CNTL__DUMMY_PAGE_PROTECTION_FAULT_ENABLE_INTERRUPT_MASK |

		GCVM_CONTEXT1_CNTL__PDE0_PROTECTION_FAULT_ENABLE_INTERRUPT_MASK |

		GCVM_CONTEXT1_CNTL__VALID_PROTECTION_FAULT_ENABLE_INTERRUPT_MASK |

		GCVM_CONTEXT1_CNTL__READ_PROTECTION_FAULT_ENABLE_INTERRUPT_MASK |

		GCVM_CONTEXT1_CNTL__WRITE_PROTECTION_FAULT_ENABLE_INTERRUPT_MASK |

		GCVM_CONTEXT1_CNTL__EXECUTE_PROTECTION_FAULT_ENABLE_INTERRUPT_MASK;



	bits[AMDGPU_MMHUB_0] = MMVM_CONTEXT1_CNTL__RANGE_PROTECTION_FAULT_ENABLE_INTERRUPT_MASK |

		MMVM_CONTEXT1_CNTL__DUMMY_PAGE_PROTECTION_FAULT_ENABLE_INTERRUPT_MASK |

		MMVM_CONTEXT1_CNTL__PDE0_PROTECTION_FAULT_ENABLE_INTERRUPT_MASK |

		MMVM_CONTEXT1_CNTL__VALID_PROTECTION_FAULT_ENABLE_INTERRUPT_MASK |

		MMVM_CONTEXT1_CNTL__READ_PROTECTION_FAULT_ENABLE_INTERRUPT_MASK |

		MMVM_CONTEXT1_CNTL__WRITE_PROTECTION_FAULT_ENABLE_INTERRUPT_MASK |

		MMVM_CONTEXT1_CNTL__EXECUTE_PROTECTION_FAULT_ENABLE_INTERRUPT_MASK;



	switch (state) {

	case AMDGPU_IRQ_STATE_DISABLE:

		/* MM HUB */

		hub = &adev->vmhub[AMDGPU_MMHUB_0];

		for (i = 0; i < 16; i++) {

			reg = hub->vm_context0_cntl + hub->ctx_distance * i;

			tmp = RREG32(reg);

			tmp &= ~bits[AMDGPU_MMHUB_0];

			WREG32(reg, tmp);

		}



		amdgpu_gmc_set_vm_fault_masks(adev, AMDGPU_MMHUB_0, false);

		/* GFX HUB */

		hub = &adev->vmhub[AMDGPU_GFXHUB_0];

		for (i = 0; i < 16; i++) {

			reg = hub->vm_context0_cntl + hub->ctx_distance * i;

			tmp = RREG32(reg);

			tmp &= ~bits[AMDGPU_GFXHUB_0];

			WREG32(reg, tmp);

		}

		amdgpu_gmc_set_vm_fault_masks(adev, AMDGPU_GFXHUB_0, false);

		break;

	case AMDGPU_IRQ_STATE_ENABLE:

		/* MM HUB */

		hub = &adev->vmhub[AMDGPU_MMHUB_0];

		for (i = 0; i < 16; i++) {

			reg = hub->vm_context0_cntl + hub->ctx_distance * i;

			tmp = RREG32(reg);

			tmp |= bits[AMDGPU_MMHUB_0];

			WREG32(reg, tmp);

		}



		amdgpu_gmc_set_vm_fault_masks(adev, AMDGPU_MMHUB_0, true);

		/* GFX HUB */

		hub = &adev->vmhub[AMDGPU_GFXHUB_0];

		for (i = 0; i < 16; i++) {

			reg = hub->vm_context0_cntl + hub->ctx_distance * i;

			tmp = RREG32(reg);

			tmp |= bits[AMDGPU_GFXHUB_0];

			WREG32(reg, tmp);

		}

		amdgpu_gmc_set_vm_fault_masks(adev, AMDGPU_GFXHUB_0, true);

		break;

	default:

		break;