Commit f9a15b96 authored by Raag Jadav's avatar Raag Jadav Committed by Andi Shyti
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drm/i915/dg2: Introduce DG2_D subplatform



Introduce DG2_D subplatform for the devices that span across multiple
DG2 subplatforms but are within same segment and will be useful for
segment specific features.

v3: Rework subplatform naming (Jani)
    Split subplatform check into separate case (Jani)

Signed-off-by: default avatarRaag Jadav <raag.jadav@intel.com>
Acked-by: default avatarJani Nikula <jani.nikula@intel.com>
Reviewed-by: default avatarAndi Shyti <andi.shyti@linux.intel.com>
Signed-off-by: default avatarAndi Shyti <andi.shyti@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241211115952.1659287-3-raag.jadav@intel.com
parent b99dcb91
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+2 −0
Original line number Diff line number Diff line
@@ -549,6 +549,8 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
	IS_SUBPLATFORM(i915, INTEL_DG2, INTEL_SUBPLATFORM_G11)
#define IS_DG2_G12(i915) \
	IS_SUBPLATFORM(i915, INTEL_DG2, INTEL_SUBPLATFORM_G12)
#define IS_DG2_D(i915) \
	IS_SUBPLATFORM(i915, INTEL_DG2, INTEL_SUBPLATFORM_D)
#define IS_RAPTORLAKE_S(i915) \
	IS_SUBPLATFORM(i915, INTEL_ALDERLAKE_S, INTEL_SUBPLATFORM_RPL)
#define IS_ALDERLAKE_P_N(i915) \
+9 −0
Original line number Diff line number Diff line
@@ -200,6 +200,10 @@ static const u16 subplatform_g12_ids[] = {
	INTEL_DG2_G12_IDS(ID),
};

static const u16 subplatform_dg2_d_ids[] = {
	INTEL_DG2_D_IDS(ID),
};

static const u16 subplatform_arl_h_ids[] = {
	INTEL_ARL_H_IDS(ID),
};
@@ -280,6 +284,11 @@ static void intel_device_info_subplatform_init(struct drm_i915_private *i915)
		mask = BIT(INTEL_SUBPLATFORM_ARL_S);
	}

	/* DG2_D ids span across multiple DG2 subplatforms */
	if (find_devid(devid, subplatform_dg2_d_ids,
		       ARRAY_SIZE(subplatform_dg2_d_ids)))
		mask |= BIT(INTEL_SUBPLATFORM_D);

	GEM_BUG_ON(mask & ~INTEL_SUBPLATFORM_MASK);

	RUNTIME_INFO(i915)->platform_mask[pi] |= mask;
+4 −1
Original line number Diff line number Diff line
@@ -95,9 +95,11 @@ enum intel_platform {
/*
 * Subplatform bits share the same namespace per parent platform. In other words
 * it is fine for the same bit to be used on multiple parent platforms.
 * Devices can belong to multiple subplatforms if needed, so it's possible to set
 * multiple bits for same device.
 */

#define INTEL_SUBPLATFORM_BITS (3)
#define INTEL_SUBPLATFORM_BITS (4)
#define INTEL_SUBPLATFORM_MASK (BIT(INTEL_SUBPLATFORM_BITS) - 1)

/* HSW/BDW/SKL/KBL/CFL */
@@ -114,6 +116,7 @@ enum intel_platform {
#define INTEL_SUBPLATFORM_G10	0
#define INTEL_SUBPLATFORM_G11	1
#define INTEL_SUBPLATFORM_G12	2
#define INTEL_SUBPLATFORM_D	3

/* ADL */
#define INTEL_SUBPLATFORM_RPL	0