Commit fd515e03 authored by Sergey Matyukevich's avatar Sergey Matyukevich Committed by Paul Walmsley
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riscv: csr: define vtype register elements 



Define masks and shifts for vtype CSR according to the vector specs:
- v0.7.1 used in early T-Head cores, known as xtheadvector in the kernel
- v1.0

Signed-off-by: default avatarSergey Matyukevich <geomatsi@gmail.com>
Reviewed-by: default avatarAndy Chiu <andybnac@gmail.com>
Tested-by: default avatarAndy Chiu <andybnac@gmail.com>
Link: https://patch.msgid.link/20251214163537.1054292-4-geomatsi@gmail.com


Signed-off-by: default avatarPaul Walmsley <pjw@kernel.org>
parent ef3ff403

arch/riscv/include/asm/csr.h

+17 −0
Original line number Diff line number Diff line
@@ -458,6 +458,23 @@ 
#define CSR_VTYPE		0xc21

#define CSR_VLENB		0xc22



#define VTYPE_VLMUL		_AC(7, UL)

#define VTYPE_VLMUL_FRAC	_AC(4, UL)

#define VTYPE_VSEW_SHIFT	3

#define VTYPE_VSEW		(_AC(7, UL) << VTYPE_VSEW_SHIFT)

#define VTYPE_VTA_SHIFT		6

#define VTYPE_VTA		(_AC(1, UL) << VTYPE_VTA_SHIFT)

#define VTYPE_VMA_SHIFT		7

#define VTYPE_VMA		(_AC(1, UL) << VTYPE_VMA_SHIFT)

#define VTYPE_VILL_SHIFT	(__riscv_xlen - 1)

#define VTYPE_VILL		(_AC(1, UL) << VTYPE_VILL_SHIFT)



#define VTYPE_VLMUL_THEAD	_AC(3, UL)

#define VTYPE_VSEW_THEAD_SHIFT  2

#define VTYPE_VSEW_THEAD	(_AC(7, UL) << VTYPE_VSEW_THEAD_SHIFT)

#define VTYPE_VEDIV_THEAD_SHIFT	5

#define VTYPE_VEDIV_THEAD	(_AC(3, UL) << VTYPE_VEDIV_THEAD_SHIFT)



/* Scalar Crypto Extension - Entropy */

#define CSR_SEED		0x015

#define SEED_OPST_MASK		_AC(0xC0000000, UL)