Commit febc689b authored by Matthew Auld's avatar Matthew Auld
Browse files

drm/xe/migrate: use XE_BO_FLAG_PAGETABLE 



On some HW we want to avoid the host caching PTEs, since access from GPU
side can be incoherent. However here the special migrate object is
mapping PTEs which are written from the host and potentially cached. Use
XE_BO_FLAG_PAGETABLE to ensure that non-cached mapping is used, on
platforms where this matters.

Fixes: 7a060d78 ("drm/xe/mtl: Map PPGTT as CPU:WC")
Signed-off-by: default avatarMatthew Auld <matthew.auld@intel.com>
Cc: Matthew Brost <matthew.brost@intel.com>
Cc: Nirmoy Das <nirmoy.das@intel.com>
Cc: <stable@vger.kernel.org> # v6.8+
Reviewed-by: default avatarNirmoy Das <nirmoy.das@intel.com>
Reviewed-by: default avatarMatthew Brost <matthew.brost@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241126181259.159713-4-matthew.auld@intel.com
parent f3dc9246

drivers/gpu/drm/xe/xe_migrate.c

+2 −1
Original line number Diff line number Diff line
@@ -209,7 +209,8 @@ static int xe_migrate_prepare_vm(struct xe_tile *tile, struct xe_migrate *m, 
				  num_entries * XE_PAGE_SIZE,

				  ttm_bo_type_kernel,

				  XE_BO_FLAG_VRAM_IF_DGFX(tile) |

				  XE_BO_FLAG_PINNED);

				  XE_BO_FLAG_PINNED |

				  XE_BO_FLAG_PAGETABLE);

	if (IS_ERR(bo))

		return PTR_ERR(bo);