Unverified Commit 02295aa2 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'zynqmp-soc-for-6.11' of https://github.com/Xilinx/linux-xlnx into soc/dt 

arm64: Xilinx DT changes for 6.11

- Add remoteproc TCM support
- Add coresight cpu debug support
- Describe OCM controller
- Disable Tri-state for SDIO on kv260
- Add compatibility strings for kv260 overlays
- Add support for k26-rev2 SOM
- Describe ina260/DP/TTC and PWM on kv260

DT schema alignments and fixes
- Align soc-nvmem binding with dt-schema
- Fix fpga region node
- Add description for efuses
- Describe USB wakeup interrupt
- Fix ams-pl node

* tag 'zynqmp-soc-for-6.11' of https://github.com/Xilinx/linux-xlnx:
  arm64: zynqmp: Add pwm-fan node and fix ttc0 pwm-cells property
  arm64: zynqmp: Add support for K26 rev2 boards
  arm64: zynqmp: Describe DisplayPort connector for Kria
  arm64: zynqmp: Add description for ina260 on kv260
  arm64: zynqmp: Add compatible string for kv260
  arm64: zynqmp: Disable Tri-state for SDIO
  arm64: zynqmp: Remove address/size-cells from ams node
  arm64: zynqmp: Describe OCM controller
  arm64: zynqmp: Describe USB wakeup interrupt
  arm64: zynqmp: Add missing description for efuses
  arm64: zynqmp: Use fpga-region as node name
  arm64: zynqmp: Align nvmem node with dt schema
  arm64: zynqmp: Add coresight cpu debug support
  dts: zynqmp: add properties for TCM in remoteproc

Link: https://lore.kernel.org/r/CAHTX3dLbNAYL4hm+bs=GByA4DqjRr3Rt6WESram8VyU1By8Mow@mail.gmail.com


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents c02138cf f9508ef9

arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi

+16 −0
Original line number Diff line number Diff line
@@ -70,6 +70,22 @@ &cpu0 { 
	clocks = <&zynqmp_clk ACPU>;

};



&cpu0_debug {

	clocks = <&zynqmp_clk DBF_FPD>;

};



&cpu1_debug {

	clocks = <&zynqmp_clk DBF_FPD>;

};



&cpu2_debug {

	clocks = <&zynqmp_clk DBF_FPD>;

};



&cpu3_debug {

	clocks = <&zynqmp_clk DBF_FPD>;

};



&fpd_dma_chan1 {

	clocks = <&zynqmp_clk GDMA_REF>, <&zynqmp_clk LPD_LSBUS>;

};

arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso

+18 −1
Original line number Diff line number Diff line
@@ -22,6 +22,17 @@ 
/plugin/;



&{/} {

	compatible = "xlnx,zynqmp-sk-kv260-revA",

		     "xlnx,zynqmp-sk-kv260-revY",

		     "xlnx,zynqmp-sk-kv260-revZ",

		     "xlnx,zynqmp-sk-kv260", "xlnx,zynqmp";

	model = "ZynqMP KV260 revA";



	ina260-u14 {

		compatible = "iio-hwmon";

		io-channels = <&u14 0>, <&u14 1>, <&u14 2>;

	};



	si5332_0: si5332-0 { /* u17 */

		compatible = "fixed-clock";

		#clock-cells = <0>;
@@ -68,7 +79,12 @@ &i2c1 { /* I2C_SCK C23/C24 - MIO from SOM */ 
	scl-gpios = <&gpio 24 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;

	sda-gpios = <&gpio 25 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;



	/* u14 - 0x40 - ina260 */

	u14: ina260@40 { /* u14 */

		compatible = "ti,ina260";

		#io-channel-cells = <1>;

		label = "ina260-u14";

		reg = <0x40>;

	};

	/* u27 - 0xe0 - STDP4320 DP/HDMI splitter */

};
@@ -321,6 +337,7 @@ conf { 
			slew-rate = <SLEW_RATE_SLOW>;

			power-source = <IO_STANDARD_LVCMOS18>;

			bias-disable;

			output-enable;

		};



		conf-cd {

arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso

+39 −2
Original line number Diff line number Diff line
@@ -17,6 +17,17 @@ 
/plugin/;



&{/} {

	compatible = "xlnx,zynqmp-sk-kv260-rev2",

		     "xlnx,zynqmp-sk-kv260-rev1",

		     "xlnx,zynqmp-sk-kv260-revB",

		     "xlnx,zynqmp-sk-kv260", "xlnx,zynqmp";

	model = "ZynqMP KV260 revB";



	ina260-u14 {

		compatible = "iio-hwmon";

		io-channels = <&u14 0>, <&u14 1>, <&u14 2>;

	};



	si5332_0: si5332-0 { /* u17 */

		compatible = "fixed-clock";

		#clock-cells = <0>;
@@ -52,6 +63,18 @@ si5332_5: si5332-5 { /* u17 */ 
		#clock-cells = <0>;

		clock-frequency = <27000000>;

	};



	dpcon {

		compatible = "dp-connector";

		label = "P11";

		type = "full-size";



		port {

			dpcon_in: endpoint {

				remote-endpoint = <&dpsub_dp_out>;

			};

		};

	};

};



&i2c1 { /* I2C_SCK C23/C24 - MIO from SOM */
@@ -63,8 +86,13 @@ &i2c1 { /* I2C_SCK C23/C24 - MIO from SOM */ 
	scl-gpios = <&gpio 24 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;

	sda-gpios = <&gpio 25 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;



	/* u14 - 0x40 - ina260 */

	/* u43 - 0x2d - usb5744 */

	u14: ina260@40 { /* u14 */

		compatible = "ti,ina260";

		#io-channel-cells = <1>;

		label = "ina260-u14";

		reg = <0x40>;

	};

	/* u43 - 0x2d - USB hub */

	/* u27 - 0xe0 - STDP4320 DP/HDMI splitter */

};
@@ -81,6 +109,14 @@ &zynqmp_dpsub { 
	phy-names = "dp-phy0", "dp-phy1";

	phys = <&psgtr 1 PHY_TYPE_DP 0 0>, <&psgtr 0 PHY_TYPE_DP 1 0>;

	assigned-clock-rates = <27000000>, <25000000>, <300000000>;



	ports {

		port@5 {

			dpsub_dp_out: endpoint {

				remote-endpoint = <&dpcon_in>;

			};

		};

	};

};



&zynqmp_dpdma {
@@ -305,6 +341,7 @@ conf { 
			slew-rate = <SLEW_RATE_SLOW>;

			power-source = <IO_STANDARD_LVCMOS18>;

			bias-disable;

			output-enable;

		};



		conf-cd {

arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dts

+16 −3
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0

/*

 * dts file for Xilinx ZynqMP SM-K26 rev1/B/A

 * dts file for Xilinx ZynqMP SM-K26 rev2/1/B/A

 *

 * (C) Copyright 2020 - 2021, Xilinx, Inc.

 * (C) Copyright 2023 - 2024, Advanced Micro Devices, Inc.

 *

 * Michal Simek <michal.simek@amd.com>

 */
@@ -17,8 +18,9 @@ 
#include <dt-bindings/pinctrl/pinctrl-zynqmp.h>



/ {

	model = "ZynqMP SM-K26 Rev1/B/A";

	compatible = "xlnx,zynqmp-sm-k26-rev1", "xlnx,zynqmp-sm-k26-revB",

	model = "ZynqMP SM-K26 Rev2/1/B/A";

	compatible = "xlnx,zynqmp-sm-k26-rev2",

		     "xlnx,zynqmp-sm-k26-rev1", "xlnx,zynqmp-sm-k26-revB",

		     "xlnx,zynqmp-sm-k26-revA", "xlnx,zynqmp-sm-k26",

		     "xlnx,zynqmp";
@@ -101,12 +103,23 @@ ams { 
			<&xilinx_ams 24>, <&xilinx_ams 25>, <&xilinx_ams 26>,

			<&xilinx_ams 27>, <&xilinx_ams 28>, <&xilinx_ams 29>;

	};



	pwm-fan {

		compatible = "pwm-fan";

		status = "okay";

		pwms = <&ttc0 2 40000 0>;

	};

};



&modepin_gpio {

	label = "modepin";

};



&ttc0 {

	status = "okay";

	#pwm-cells = <3>;

};



&uart1 { /* MIO36/MIO37 */

	status = "okay";

};

arch/arm64/boot/dts/xilinx/zynqmp-smk-k26-revA.dts

+5 −3
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0

/*

 * dts file for Xilinx ZynqMP SMK-K26 rev1/B/A

 * dts file for Xilinx ZynqMP SMK-K26 rev2/1/B/A

 *

 * (C) Copyright 2020 - 2021, Xilinx, Inc.

 * (C) Copyright 2023 - 2024, Advanced Micro Devices, Inc.

 *

 * Michal Simek <michal.simek@amd.com>

 */
@@ -10,8 +11,9 @@ 
#include "zynqmp-sm-k26-revA.dts"



/ {

	model = "ZynqMP SMK-K26 Rev1/B/A";

	compatible = "xlnx,zynqmp-smk-k26-rev1", "xlnx,zynqmp-smk-k26-revB",

	model = "ZynqMP SMK-K26 Rev2/1/B/A";

	compatible = "xlnx,zynqmp-smk-k26-rev2",

		     "xlnx,zynqmp-smk-k26-rev1", "xlnx,zynqmp-smk-k26-revB",

		     "xlnx,zynqmp-smk-k26-revA", "xlnx,zynqmp-smk-k26",

		     "xlnx,zynqmp";

};