Commit 08903184 authored by Luke Wang's avatar Luke Wang Committed by Frank Li
Browse files

arm64: dts: imx93-9x9-qsb: change usdhc tuning step for eMMC and SD 



During system resume, the following errors occurred:

  [  430.638625] mmc1: error -84 writing Cache Enable bit
  [  430.643618] mmc1: error -84 doing runtime resume

For eMMC and SD, there are two tuning pass windows and the gap between
those two windows may only have one cell. If tuning step > 1, the gap may
just be skipped and host assumes those two windows as a continuous
windows. This will cause a wrong delay cell near the gap to be selected.

Set the tuning step to 1 to avoid selecting the wrong delay cell.

For SDIO, the gap is sufficiently large, so the default tuning step does
not cause this issue.

Fixes: 0565d20c ("arm64: dts: freescale: Support i.MX93 9x9 Quick Start Board")
Signed-off-by: default avatarLuke Wang <ziniu.wang_1@nxp.com>
Reviewed-by: default avatarFrank Li <Frank.Li@nxp.com>
Signed-off-by: default avatarFrank Li <Frank.Li@nxp.com>
parent 1f99b5d9

arch/arm64/boot/dts/freescale/imx93-9x9-qsb.dts

+2 −0
Original line number Diff line number Diff line
@@ -507,6 +507,7 @@ &usdhc1 { 
	pinctrl-2 = <&pinctrl_usdhc1_200mhz>;

	bus-width = <8>;

	non-removable;

	fsl,tuning-step = <1>;

	status = "okay";

};
@@ -519,6 +520,7 @@ &usdhc2 { 
	vmmc-supply = <&reg_usdhc2_vmmc>;

	bus-width = <4>;

	no-mmc;

	fsl,tuning-step = <1>;

	status = "okay";

};