Commit 0c154698 authored by Guanjun's avatar Guanjun Committed by Vinod Koul
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dmaengine: idxd: Fix incorrect descriptions for GRPCFG register



Fix incorrect descriptions for the GRPCFG register which has three
sub-registers (GRPWQCFG, GRPENGCFG and GRPFLGCFG).
No functional changes

Signed-off-by: default avatarGuanjun <guanjun@linux.alibaba.com>
Reviewed-by: default avatarDave Jiang <dave.jiang@intel.com>
Reviewed-by: default avatarFenghua Yu <fenghua.yu@intel.com>
Acked-by: default avatarLijun Pan <lijun.pan@intel.com>
Link: https://lore.kernel.org/r/20231211053704.2725417-3-guanjun@linux.alibaba.com


Signed-off-by: default avatarVinod Koul <vkoul@kernel.org>
parent 778dfacc
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+7 −5
Original line number Diff line number Diff line
@@ -440,12 +440,14 @@ union wqcfg {
/*
 * This macro calculates the offset into the GRPCFG register
 * idxd - struct idxd *
 * n - wq id
 * ofs - the index of the 32b dword for the config register
 * n - group id
 * ofs - the index of the 64b qword for the config register
 *
 * The WQCFG register block is divided into groups per each wq. The n index
 * allows us to move to the register group that's for that particular wq.
 * Each register is 32bits. The ofs gives us the number of register to access.
 * The GRPCFG register block is divided into three sub-registers, which
 * are GRPWQCFG, GRPENGCFG and GRPFLGCFG. The n index allows us to move
 * to the register block that contains the three sub-registers.
 * Each register block is 64bits. And the ofs gives us the offset
 * within the GRPWQCFG register to access.
 */
#define GRPWQCFG_OFFSET(idxd_dev, n, ofs) ((idxd_dev)->grpcfg_offset +\
					   (n) * GRPCFG_SIZE + sizeof(u64) * (ofs))