Commit 0f9b8054 authored by Manivannan Sadhasivam's avatar Manivannan Sadhasivam Committed by Bjorn Andersson
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arm64: dts: qcom: sm8650: Fix UFS PHY clocks 



QMP PHY used in SM8650 requires 3 clocks:

* ref - 19.2MHz reference clock from RPMh
* ref_aux - Auxiliary reference clock from GCC
* qref - QREF clock from TCSR

Fixes: 10e02467 ("arm64: dts: qcom: sm8650: add interconnect dependent device nodes")
Signed-off-by: default avatarManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: default avatarKonrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240131-ufs-phy-clock-v3-17-58a49d2f4605@linaro.org


Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
parent 746ae23a

arch/arm64/boot/dts/qcom/sm8650.dtsi

+5 −3
Original line number Diff line number Diff line
@@ -2489,10 +2489,12 @@ ufs_mem_phy: phy@1d80000 { 
			compatible = "qcom,sm8650-qmp-ufs-phy";

			reg = <0 0x01d80000 0 0x2000>;



			clocks = <&tcsr TCSR_UFS_CLKREF_EN>,

				 <&gcc GCC_UFS_PHY_PHY_AUX_CLK>;

			clocks = <&rpmhcc RPMH_CXO_CLK>,

				 <&gcc GCC_UFS_PHY_PHY_AUX_CLK>,

				 <&tcsr TCSR_UFS_CLKREF_EN>;

			clock-names = "ref",

				      "ref_aux";

				      "ref_aux",

				      "qref";



			resets = <&ufs_mem_hc 0>;

			reset-names = "ufsphy";