Commit 0fdcc948 authored by Konrad Dybcio's avatar Konrad Dybcio Committed by Bjorn Andersson
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arm64: dts: qcom: agatti: Add CX_MEM/DBGC GPU regions



Describe the GPU register regions, with the former existing but not
being used much if at all on this silicon, and the latter containing
various debugging levers generally related to dumping the state of
the IP upon a crash.

Fixes: 4faeef52 ("arm64: dts: qcom: qcm2290: Add GPU nodes")
Reported-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Closes: https://lore.kernel.org/linux-arm-msm/8a64f70b-8034-45e7-86a3-0015cf357132@oss.qualcomm.com/T/#m404f1425c36b61467760f058b696b8910340a063


Signed-off-by: default avatarKonrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: default avatarDmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: default avatarAkhil P Oommen <akhilpo@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20251229-topic-6115_2290_gpu_dbgc-v1-2-4a24d196389c@oss.qualcomm.com


Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
parent be9d54c3
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+6 −2
Original line number Diff line number Diff line
@@ -1643,8 +1643,12 @@ usb_dwc3_ss: endpoint {

		gpu: gpu@5900000 {
			compatible = "qcom,adreno-07000200", "qcom,adreno";
			reg = <0x0 0x05900000 0x0 0x40000>;
			reg-names = "kgsl_3d0_reg_memory";
			reg = <0x0 0x05900000 0x0 0x40000>,
			      <0x0 0x0599e000 0x0 0x1000>,
			      <0x0 0x05961000 0x0 0x800>;
			reg-names = "kgsl_3d0_reg_memory",
				    "cx_mem",
				    "cx_dbgc";

			interrupts = <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>;