Commit 108a7677 authored by Inochi Amaoto's avatar Inochi Amaoto
Browse files

riscv: dts: sophgo: switch precise compatible for existed clock device for CV18XX 



replace newly added precise compatible with old one for existed
clock device of CV18XX series SoCs.

Reviewed-by: default avatarAlexander Sverdlin <alexander.sverdlin@gmail.com>
Link: https://lore.kernel.org/r/20250504104553.1447819-4-inochiama@gmail.com


Signed-off-by: default avatarInochi Amaoto <inochiama@gmail.com>
Signed-off-by: default avatarChen Wang <unicorn_wang@outlook.com>
Signed-off-by: default avatarChen Wang <wangchen20@iscas.ac.cn>
parent ae5bac37

arch/riscv/boot/dts/sophgo/cv1800b.dtsi

+1 −1
Original line number Diff line number Diff line
@@ -29,7 +29,7 @@ pinctrl: pinctrl@3001000 { 
		};



		clk: clock-controller@3002000 {

			compatible = "sophgo,cv1800-clk";

			compatible = "sophgo,cv1800b-clk";

			reg = <0x03002000 0x1000>;

			clocks = <&osc>;

			#clock-cells = <1>;

arch/riscv/boot/dts/sophgo/cv1812h.dtsi

+1 −1
Original line number Diff line number Diff line
@@ -31,7 +31,7 @@ pinctrl: pinctrl@3001000 { 
		};



		clk: clock-controller@3002000 {

			compatible = "sophgo,cv1810-clk";

			compatible = "sophgo,cv1812h-clk";

			reg = <0x03002000 0x1000>;

			clocks = <&osc>;

			#clock-cells = <1>;

arch/riscv/boot/dts/sophgo/sg2002.dtsi

+1 −1
Original line number Diff line number Diff line
@@ -31,7 +31,7 @@ pinctrl: pinctrl@3001000 { 
		};



		clk: clock-controller@3002000 {

			compatible = "sophgo,sg2000-clk";

			compatible = "sophgo,sg2002-clk", "sophgo,sg2000-clk";

			reg = <0x03002000 0x1000>;

			clocks = <&osc>;

			#clock-cells = <1>;