Unverified Commit 28dbcfbc authored by Matt Coster's avatar Matt Coster
Browse files

drm/imagination: Make has_fixed_data_addr a value 



This is currently a callback function which takes no parameters; there's
no reason for this so let's make it a straightforward value in pvr_fw_defs.

Reviewed-by: default avatarFrank Binns <frank.binns@imgtec.com>
Link: https://lore.kernel.org/r/20250410-sets-bxs-4-64-patch-v1-v6-10-eda620c5865f@imgtec.com


Signed-off-by: default avatarMatt Coster <matt.coster@imgtec.com>
parent 091ffb00

drivers/gpu/drm/imagination/pvr_fw.c

+1 −1
Original line number Diff line number Diff line
@@ -662,7 +662,7 @@ pvr_fw_process(struct pvr_device *pvr_dev) 
		return PTR_ERR(fw_code_ptr);

	}



	if (pvr_dev->fw_dev.defs->has_fixed_data_addr()) {

	if (pvr_dev->fw_dev.defs->has_fixed_data_addr) {

		u32 base_addr = private_data->base_addr & pvr_dev->fw_dev.fw_heap_info.offset_mask;



		fw_data_ptr =

drivers/gpu/drm/imagination/pvr_fw.h

+8 −15
Original line number Diff line number Diff line
@@ -166,21 +166,6 @@ struct pvr_fw_defs { 
	 */

	int (*wrapper_init)(struct pvr_device *pvr_dev);



	/**

	 * @has_fixed_data_addr:

	 *

	 * Called to check if firmware fixed data must be loaded at the address given by the

	 * firmware layout table.

	 *

	 * This function is mandatory.

	 *

	 * Returns:

	 *  * %true if firmware fixed data must be loaded at the address given by the firmware

	 *    layout table.

	 *  * %false otherwise.

	 */

	bool (*has_fixed_data_addr)(void);



	/**

	 * @irq: FW Interrupt information.

	 *
@@ -205,6 +190,14 @@ struct pvr_fw_defs { 
		/** @clear_mask: Value to write to the clear_reg in order to clear FW IRQs. */

		u32 clear_mask;

	} irq;



	/**

	 * @has_fixed_data_addr: Specify whether the firmware fixed data must be loaded at the

	 *                       address given by the firmware layout table.

	 *

	 * This value is mandatory.

	 */

	bool has_fixed_data_addr;

};



/**

drivers/gpu/drm/imagination/pvr_fw_meta.c

+1 −7
Original line number Diff line number Diff line
@@ -532,12 +532,6 @@ pvr_meta_vm_unmap(struct pvr_device *pvr_dev, struct pvr_fw_object *fw_obj) 
			 fw_obj->fw_mm_node.start, fw_obj->fw_mm_node.size);

}



static bool

pvr_meta_has_fixed_data_addr(void)

{

	return false;

}



const struct pvr_fw_defs pvr_fw_defs_meta = {

	.init = pvr_meta_init,

	.fw_process = pvr_meta_fw_process,
@@ -545,11 +539,11 @@ const struct pvr_fw_defs pvr_fw_defs_meta = { 
	.vm_unmap = pvr_meta_vm_unmap,

	.get_fw_addr_with_offset = pvr_meta_get_fw_addr_with_offset,

	.wrapper_init = pvr_meta_wrapper_init,

	.has_fixed_data_addr = pvr_meta_has_fixed_data_addr,

	.irq = {

		.status_reg = ROGUE_CR_META_SP_MSLVIRQSTATUS,

		.clear_reg = ROGUE_CR_META_SP_MSLVIRQSTATUS,

		.status_mask = ROGUE_CR_META_SP_MSLVIRQSTATUS_TRIGVECT2_EN,

		.clear_mask = ROGUE_CR_META_SP_MSLVIRQSTATUS_TRIGVECT2_CLRMSK,

	},

	.has_fixed_data_addr = false,

};

drivers/gpu/drm/imagination/pvr_fw_mips.c

+1 −7
Original line number Diff line number Diff line
@@ -225,12 +225,6 @@ pvr_mips_get_fw_addr_with_offset(struct pvr_fw_object *fw_obj, u32 offset) 
	       ROGUE_FW_HEAP_MIPS_BASE;

}



static bool

pvr_mips_has_fixed_data_addr(void)

{

	return true;

}



const struct pvr_fw_defs pvr_fw_defs_mips = {

	.init = pvr_mips_init,

	.fini = pvr_mips_fini,
@@ -239,11 +233,11 @@ const struct pvr_fw_defs pvr_fw_defs_mips = { 
	.vm_unmap = pvr_vm_mips_unmap,

	.get_fw_addr_with_offset = pvr_mips_get_fw_addr_with_offset,

	.wrapper_init = pvr_mips_wrapper_init,

	.has_fixed_data_addr = pvr_mips_has_fixed_data_addr,

	.irq = {

		.status_reg = ROGUE_CR_MIPS_WRAPPER_IRQ_STATUS,

		.clear_reg = ROGUE_CR_MIPS_WRAPPER_IRQ_CLEAR,

		.status_mask = ROGUE_CR_MIPS_WRAPPER_IRQ_STATUS_EVENT_EN,

		.clear_mask = ROGUE_CR_MIPS_WRAPPER_IRQ_CLEAR_EVENT_EN,

	},

	.has_fixed_data_addr = true,

};