Commit 3ad0edc4 authored by Moudy Ho's avatar Moudy Ho Committed by Chun-Kuang Hu
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dt-bindings: display: mediatek: split: add subschema property constraints



The display node in mt8195.dtsi was triggering a CHECK_DTBS error due
to an excessively long 'clocks' property:
  display@14f06000: clocks: [[31, 14], [31, 43], [31, 44]] is too long

To resolve this issue, the constraints for 'clocks' and
other properties within the subschemas will be reinforced.

Fixes: 739058a9 ("dt-bindings: display: mediatek: split: add compatible for MT8195")
Signed-off-by: default avatarMacpaul Lin <macpaul.lin@mediatek.com>
Signed-off-by: default avatarMoudy Ho <moudy.ho@mediatek.com>
Reviewed-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://patchwork.kernel.org/project/dri-devel/patch/20241007022834.4609-1-moudy.ho@mediatek.com/


Signed-off-by: default avatarChun-Kuang Hu <chunkuang.hu@kernel.org>
parent af6ab107
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+19 −0
Original line number Diff line number Diff line
@@ -38,6 +38,7 @@ properties:
    description: A phandle and PM domain specifier as defined by bindings of
      the power controller specified by phandle. See
      Documentation/devicetree/bindings/power/power-domain.yaml for details.
    maxItems: 1

  mediatek,gce-client-reg:
    description:
@@ -57,6 +58,9 @@ properties:
  clocks:
    items:
      - description: SPLIT Clock
      - description: Used for interfacing with the HDMI RX signal source.
      - description: Paired with receiving HDMI RX metadata.
    minItems: 1

required:
  - compatible
@@ -72,9 +76,24 @@ allOf:
            const: mediatek,mt8195-mdp3-split

    then:
      properties:
        clocks:
          minItems: 3

      required:
        - mediatek,gce-client-reg

  - if:
      properties:
        compatible:
          contains:
            const: mediatek,mt8173-disp-split

    then:
      properties:
        clocks:
          maxItems: 1

additionalProperties: false

examples: