Unverified Commit 3dcf683b authored by Peter Ujfalusi's avatar Peter Ujfalusi Committed by Mark Brown
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ASoC: SOF: ipc4-topology: Account for different ChainDMA host buffer size 



For ChainDMA the firmware allocates 5ms host buffer instead of the standard
4ms which should be taken into account when setting the constraint on the
buffer size.

Fixes: 842bb8b6 ("ASoC: SOF: ipc4-topology: Save the DMA maximum burst size for PCMs")
Signed-off-by: default avatarPeter Ujfalusi <peter.ujfalusi@linux.intel.com>
Reviewed-by: default avatarRanjani Sridharan <ranjani.sridharan@linux.intel.com>
Reviewed-by: default avatarKai Vehmanen <kai.vehmanen@linux.intel.com>
Reviewed-by: default avatarBard Liao <yung-chuan.liao@linux.intel.com>
Link: https://patch.msgid.link/20251002135752.2430-3-peter.ujfalusi@linux.intel.com


Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent a7fe5ff8

sound/soc/sof/ipc4-topology.c

+7 −2
Original line number Diff line number Diff line
@@ -666,8 +666,13 @@ static int sof_ipc4_widget_setup_pcm(struct snd_sof_widget *swidget) 
				      swidget->tuples,

				      swidget->num_tuples, sizeof(u32), 1);

		/* Set default DMA buffer size if it is not specified in topology */

		if (!sps->dsp_max_burst_size_in_ms)

			sps->dsp_max_burst_size_in_ms = SOF_IPC4_MIN_DMA_BUFFER_SIZE;

		if (!sps->dsp_max_burst_size_in_ms) {

			struct snd_sof_widget *pipe_widget = swidget->spipe->pipe_widget;

			struct sof_ipc4_pipeline *pipeline = pipe_widget->private;



			sps->dsp_max_burst_size_in_ms = pipeline->use_chain_dma ?

				SOF_IPC4_CHAIN_DMA_BUFFER_SIZE : SOF_IPC4_MIN_DMA_BUFFER_SIZE;

		}

	} else {

		/* Capture data is copied from DSP to host in 1ms bursts */

		spcm->stream[dir].dsp_max_burst_size_in_ms = 1;

sound/soc/sof/ipc4-topology.h

+3 −0
Original line number Diff line number Diff line
@@ -73,6 +73,9 @@ 
/* FW requires minimum 4ms DMA buffer size */

#define SOF_IPC4_MIN_DMA_BUFFER_SIZE	4



/* ChainDMA in fw uses 5ms DMA buffer */

#define SOF_IPC4_CHAIN_DMA_BUFFER_SIZE	5



/*

 * The base of multi-gateways. Multi-gateways addressing starts from

 * ALH_MULTI_GTW_BASE and there are ALH_MULTI_GTW_COUNT multi-sources