Commit 4360a2b5 authored by Dave Airlie's avatar Dave Airlie Committed by Jani Nikula
Browse files

drm/i915/display: add intel_fdi_link_train wrapper. 



This wraps the fdi link training vfunc to make it clearer.

Suggested by Jani.

Reviewed-by: default avatarJani Nikula <jani.nikula@intel.com>
Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
Signed-off-by: default avatarJani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1bb978bcb6f16fbdaf08f2800a179b774525b59e.1632869550.git.jani.nikula@intel.com
parent 44892ffa

drivers/gpu/drm/i915/display/intel_display.c

+1 −1
Original line number Diff line number Diff line
@@ -2165,7 +2165,7 @@ static void ilk_pch_enable(const struct intel_atomic_state *state, 
	assert_pch_transcoder_disabled(dev_priv, pipe);



	/* For PCH output, training FDI link */

	dev_priv->display.fdi_link_train(crtc, crtc_state);

	intel_fdi_link_train(crtc, crtc_state);



	/* We need to program the right clock selection before writing the pixel

	 * mutliplier into the DPLL. */

drivers/gpu/drm/i915/display/intel_fdi.c

+8 −0
Original line number Diff line number Diff line
@@ -10,6 +10,14 @@ 
#include "intel_fdi.h"

#include "intel_sideband.h"



void intel_fdi_link_train(struct intel_crtc *crtc,

			  const struct intel_crtc_state *crtc_state)

{

	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);



	dev_priv->display.fdi_link_train(crtc, crtc_state);

}



/* units of 100MHz */

static int pipe_required_fdi_lanes(struct intel_crtc_state *crtc_state)

{

drivers/gpu/drm/i915/display/intel_fdi.h

+2 −0
Original line number Diff line number Diff line
@@ -26,4 +26,6 @@ void hsw_fdi_link_train(struct intel_encoder *encoder, 
void intel_fdi_pll_freq_update(struct drm_i915_private *i915);

void lpt_fdi_program_mphy(struct drm_i915_private *i915);



void intel_fdi_link_train(struct intel_crtc *crtc,

			  const struct intel_crtc_state *crtc_state);

#endif