Commit 501672e3 authored by John Smith's avatar John Smith Committed by Alex Deucher
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drm/amd/pm/powerplay/smumgr: Fix PCIeBootLinkLevel value on Iceland 



Previously this was initialized with zero which represented PCIe Gen
1.0 instead of using the
maximum value from the speed table which is the behaviour of all other
smumgr implementations.

Fixes: 18aafc59 ("drm/amd/powerplay: implement fw related smu interface for iceland.")
Signed-off-by: default avatarJohn Smith <itistotalbotnet@gmail.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
(cherry picked from commit 92b0a6ae)
parent 07a13f91

drivers/gpu/drm/amd/pm/powerplay/smumgr/iceland_smumgr.c

+1 −1
Original line number Diff line number Diff line
@@ -2028,7 +2028,7 @@ static int iceland_init_smc_table(struct pp_hwmgr *hwmgr) 
	table->VoltageResponseTime  = 0;

	table->PhaseResponseTime  = 0;

	table->MemoryThermThrottleEnable  = 1;

	table->PCIeBootLinkLevel = 0;

	table->PCIeBootLinkLevel = (uint8_t) (data->dpm_table.pcie_speed_table.count);

	table->PCIeGenInterval = 1;



	result = iceland_populate_smc_svi2_config(hwmgr, table);