Commit 59c35416 authored by Linus Torvalds's avatar Linus Torvalds
Browse files
Pull clk updates from Stephen Boyd:
 "Here's the pile of clk driver patches. The usual suspects^Wsilicon
  vendors are all here, adding new SoC support and fixing existing code.

  There are a few patches to the clk framework here as well. They've
  been baking in linux-next for weeks so I'm hoping we don't have to
  revert them. The disable OF node patch is probably the scariest one
  although it seems unlikely that a system would be relying on a driver
  _not_ probing because the clk never appeared, but you never know.

  Nothing looks out of the ordinary on the driver side but that's
  because it's mostly a bunch of data.

  Core:
   - Use dev_err_probe() in the clk registration path (Peering into the
     crystal ball shows many patches that remove printks)
   - Check for disabled OF nodes in of_clk_get_hw_from_clkspec()

  New Drivers:
   - Allwinner A523/T527 clk driver
   - Qualcomm IPQ9574 NSS clk driver
   - Qualcomm QCS8300 GPU and video clk drivers
   - Qualcomm SDM429 RPM clks
   - Qualcomm QCM6490 LPASS (low power audio) resets
   - Samsung Exynos2200: driver for several clock controllers (Alive,
     CMGP, HSI, PERIC/PERIS, TOP, UFS and VFS)
   - Samsung Exynos7870: Driver for several clock controllers (Alive,
     MIF, DISP AUD, FSYS, G3D, ISP, MFC and PERI)
   - Rockchip rk3528 and rk3562 clk driver

  Updates:
   - Various fixes to SoC clk drivers for incorrect data, avoid touching
     protected registers, etc.
   - Additions for some missing clks in existing SoC clk drivers
   - DT schema conversions from text to YAML
   - Kconfig cleanups to allow drivers to be compiled on moar
     architectures"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (125 commits)
  clk: qcom: Add NSS clock Controller driver for IPQ9574
  clk: qcom: gcc-ipq9574: Add support for gpll0_out_aux clock
  dt-bindings: clock: Add ipq9574 NSSCC clock and reset definitions
  dt-bindings: clock: gcc-ipq9574: Add definition for GPLL0_OUT_AUX
  clk: qcom: gcc-msm8953: fix stuck venus0_core0 clock
  clk: qcom: mmcc-sdm660: fix stuck video_subcore0 clock
  dt-bindings: clock: qcom,x1e80100-camcc: Fix the list of required-opps
  clk: amlogic: a1: fix a typo
  clk: amlogic: gxbb: drop non existing 32k clock parent
  clk: amlogic: gxbb: drop incorrect flag on 32k clock
  clk: amlogic: g12b: fix cluster A parent data
  clk: amlogic: g12a: fix mmc A peripheral clock
  dt-bindings: clocks: atmel,at91rm9200-pmc: add missing compatibles
  dt-bindings: reset: fix double id on rk3562-cru reset ids
  drivers: clk: qcom: ipq5424: fix the freq table of sdcc1_apps clock
  clk: qcom: lpassaudiocc-sc7280: Add support for LPASS resets for QCM6490
  dt-bindings: clock: qcom: Add compatible for QCM6490 boards
  clk: qcom: gdsc: Update the status poll timeout for GDSC
  clk: qcom: gdsc: Set retain_ff before moving to HW CTRL
  clk: davinci: remove support for da830
  ...
parents 472863ab e988adcb
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+103 −0
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/clock/allwinner,sun55i-a523-ccu.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Allwinner A523 Clock Control Unit

maintainers:
  - Andre Przywara <andre.przywara@arm.com>

properties:
  "#clock-cells":
    const: 1

  "#reset-cells":
    const: 1

  compatible:
    enum:
      - allwinner,sun55i-a523-ccu
      - allwinner,sun55i-a523-r-ccu

  reg:
    maxItems: 1

  clocks:
    minItems: 4
    maxItems: 5

  clock-names:
    minItems: 4
    maxItems: 5

required:
  - "#clock-cells"
  - "#reset-cells"
  - compatible
  - reg
  - clocks
  - clock-names

allOf:
  - if:
      properties:
        compatible:
          enum:
            - allwinner,sun55i-a523-ccu

    then:
      properties:
        clocks:
          items:
            - description: High Frequency Oscillator (usually at 24MHz)
            - description: Low Frequency Oscillator (usually at 32kHz)
            - description: Internal Oscillator
            - description: Low Frequency Oscillator fanout

        clock-names:
          items:
            - const: hosc
            - const: losc
            - const: iosc
            - const: losc-fanout

  - if:
      properties:
        compatible:
          enum:
            - allwinner,sun55i-a523-r-ccu

    then:
      properties:
        clocks:
          items:
            - description: High Frequency Oscillator (usually at 24MHz)
            - description: Low Frequency Oscillator (usually at 32kHz)
            - description: Internal Oscillator
            - description: Peripherals PLL
            - description: Audio PLL

        clock-names:
          items:
            - const: hosc
            - const: losc
            - const: iosc
            - const: pll-periph
            - const: pll-audio

additionalProperties: false

examples:
  - |
    clock-controller@2001000 {
        compatible = "allwinner,sun55i-a523-ccu";
        reg = <0x02001000 0x1000>;
        clocks = <&osc24M>, <&osc32k>, <&iosc>, <&r_ccu 1>;
        clock-names = "hosc", "losc", "iosc", "losc-fanout";
        #clock-cells = <1>;
        #reset-cells = <1>;
    };

...
+4 −0
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@@ -34,6 +34,8 @@ properties:
          - enum:
              - atmel,at91rm9200-pmc
              - atmel,at91sam9260-pmc
              - atmel,at91sam9261-pmc
              - atmel,at91sam9263-pmc
              - atmel,at91sam9g45-pmc
              - atmel,at91sam9n12-pmc
              - atmel,at91sam9rl-pmc
@@ -111,6 +113,8 @@ allOf:
            enum:
              - atmel,at91rm9200-pmc
              - atmel,at91sam9260-pmc
              - atmel,at91sam9261-pmc
              - atmel,at91sam9263-pmc
              - atmel,at91sam9g20-pmc
    then:
      properties:
+8 −0
Original line number Diff line number Diff line
@@ -43,6 +43,13 @@ properties:
      ID in its "clocks" phandle cell. See include/dt-bindings/clock/imx8m-clock.h
      for the full list of i.MX8M clock IDs.

  fsl,operating-mode:
    $ref: /schemas/types.yaml#/definitions/string
    enum: [nominal, overdrive]
    description:
      The operating mode of the SoC. This affects the maximum clock rates that
      can safely be configured by the clock controller.

required:
  - compatible
  - reg
@@ -109,6 +116,7 @@ examples:
                 <&clk_ext3>, <&clk_ext4>;
        clock-names = "osc_32k", "osc_24m", "clk_ext1", "clk_ext2",
                      "clk_ext3", "clk_ext4";
        fsl,operating-mode = "nominal";
    };

  - |
+6 −4
Original line number Diff line number Diff line
@@ -24,8 +24,8 @@ properties:
    maxItems: 1

  clocks:
    minItems: 7
    maxItems: 7
    minItems: 8
    maxItems: 8

  clock-names:
    items:
@@ -36,6 +36,7 @@ properties:
      - const: sai5
      - const: sai6
      - const: sai7
      - const: axi

  '#clock-cells':
    const: 1
@@ -72,10 +73,11 @@ examples:
                 <&clk IMX8MP_CLK_SAI3>,
                 <&clk IMX8MP_CLK_SAI5>,
                 <&clk IMX8MP_CLK_SAI6>,
                 <&clk IMX8MP_CLK_SAI7>;
                 <&clk IMX8MP_CLK_SAI7>,
                 <&clk IMX8MP_CLK_AUDIO_AXI_ROOT>;
        clock-names = "ahb",
                      "sai1", "sai2", "sai3",
                      "sai5", "sai6", "sai7";
                      "sai5", "sai6", "sai7", "axi";
        power-domains = <&pgc_audio>;
    };

+21 −0
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@@ -57,6 +57,27 @@ required:
  - reg
  - '#clock-cells'

allOf:
  - if:
      properties:
        compatible:
          contains:
            enum:
              - mediatek,mt8188-camsys-rawa
              - mediatek,mt8188-camsys-rawb
              - mediatek,mt8188-camsys-yuva
              - mediatek,mt8188-camsys-yuvb
              - mediatek,mt8188-imgsys-wpe1
              - mediatek,mt8188-imgsys-wpe2
              - mediatek,mt8188-imgsys-wpe3
              - mediatek,mt8188-imgsys1-dip-nr
              - mediatek,mt8188-imgsys1-dip-top
              - mediatek,mt8188-ipesys

    then:
      required:
        - '#reset-cells'

additionalProperties: false

examples:
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