Commit 5d2f3c3a authored by Cheng-Chieh Hsieh's avatar Cheng-Chieh Hsieh Committed by Kalle Valo
Browse files

wifi: rtw89: modify the register setting and the flow of CFO tracking 



The register address used for CFO(carrier frequency offset) tracking is
different from WiFi 7 series, so we change the way to access it. And we
refine the flow of CFO tracking to compatible all WiFi 7 and 6 ICs.

Signed-off-by: default avatarCheng-Chieh Hsieh <cj.hsieh@realtek.com>
Signed-off-by: default avatarPing-Ke Shih <pkshih@realtek.com>
Signed-off-by: default avatarKalle Valo <kvalo@kernel.org>
Link: https://lore.kernel.org/r/20231016065115.751662-4-pkshih@realtek.com
parent 4ba17aa4

drivers/net/wireless/realtek/rtw89/phy.c

+24 −8
Original line number Diff line number Diff line
@@ -2557,6 +2557,9 @@ static void rtw89_dcfo_comp(struct rtw89_dev *rtwdev, s32 curr_cfo) 
	s32 dcfo_comp_val;

	int sign;



	if (rtwdev->chip->chip_id == RTL8922A)

		return;



	if (!is_linked) {

		rtw89_debug(rtwdev, RTW89_DBG_CFO, "DCFO: is_linked=%d\n",

			    is_linked);
@@ -2577,16 +2580,21 @@ static void rtw89_dcfo_comp(struct rtw89_dev *rtwdev, s32 curr_cfo) 


static void rtw89_dcfo_comp_init(struct rtw89_dev *rtwdev)

{

	const struct rtw89_phy_gen_def *phy = rtwdev->chip->phy_def;

	const struct rtw89_chip_info *chip = rtwdev->chip;

	const struct rtw89_cfo_regs *cfo = phy->cfo;



	rtw89_phy_set_phy_regs(rtwdev, R_DCFO_OPT, B_DCFO_OPT_EN, 1);

	rtw89_phy_set_phy_regs(rtwdev, R_DCFO_WEIGHT, B_DCFO_WEIGHT_MSK, 8);

	rtw89_phy_set_phy_regs(rtwdev, cfo->comp_seg0, cfo->valid_0_mask, 1);

	rtw89_phy_set_phy_regs(rtwdev, cfo->comp, cfo->weighting_mask, 8);



	if (chip->chip_gen == RTW89_CHIP_AX) {

		if (chip->cfo_hw_comp)

			rtw89_write32_mask(rtwdev, R_AX_PWR_UL_CTRL2,

					   B_AX_PWR_UL_CFO_MASK, 0x6);

		else

		rtw89_write32_clr(rtwdev, R_AX_PWR_UL_CTRL2, B_AX_PWR_UL_CFO_MASK);

			rtw89_write32_clr(rtwdev, R_AX_PWR_UL_CTRL2,

					  B_AX_PWR_UL_CFO_MASK);

	}

}



static void rtw89_phy_cfo_init(struct rtw89_dev *rtwdev)
@@ -2630,7 +2638,7 @@ static void rtw89_phy_cfo_crystal_cap_adjust(struct rtw89_dev *rtwdev, 
		if (cfo_abs > CFO_TRK_ENABLE_TH)

			cfo->is_adjust = true;

	} else {

		if (cfo_abs < CFO_TRK_STOP_TH)

		if (cfo_abs <= CFO_TRK_STOP_TH)

			cfo->is_adjust = false;

	}

	if (!cfo->is_adjust) {
@@ -4966,10 +4974,18 @@ static const struct rtw89_physts_regs rtw89_physts_regs_ax = { 
	.dis_trigger_brk_mask = B_STS_DIS_TRIG_BY_BRK,

};



static const struct rtw89_cfo_regs rtw89_cfo_regs_ax = {

	.comp = R_DCFO_WEIGHT,

	.weighting_mask = B_DCFO_WEIGHT_MSK,

	.comp_seg0 = R_DCFO_OPT,

	.valid_0_mask = B_DCFO_OPT_EN,

};



const struct rtw89_phy_gen_def rtw89_phy_gen_ax = {

	.cr_base = 0x10000,

	.ccx = &rtw89_ccx_regs_ax,

	.physts = &rtw89_physts_regs_ax,

	.cfo = &rtw89_cfo_regs_ax,



	.set_txpwr_byrate = rtw89_phy_set_txpwr_byrate_ax,

	.set_txpwr_offset = rtw89_phy_set_txpwr_offset_ax,

drivers/net/wireless/realtek/rtw89/phy.h

+8 −0
Original line number Diff line number Diff line
@@ -405,6 +405,13 @@ struct rtw89_physts_regs { 
	u32 dis_trigger_brk_mask;

};



struct rtw89_cfo_regs {

	u32 comp;

	u32 weighting_mask;

	u32 comp_seg0;

	u32 valid_0_mask;

};



enum rtw89_bandwidth_section_num_ax {

	RTW89_BW20_SEC_NUM_AX = 8,

	RTW89_BW40_SEC_NUM_AX = 4,
@@ -475,6 +482,7 @@ struct rtw89_phy_gen_def { 
	u32 cr_base;

	const struct rtw89_ccx_regs *ccx;

	const struct rtw89_physts_regs *physts;

	const struct rtw89_cfo_regs *cfo;



	void (*set_txpwr_byrate)(struct rtw89_dev *rtwdev,

				 const struct rtw89_chan *chan,

drivers/net/wireless/realtek/rtw89/phy_be.c

+8 −0
Original line number Diff line number Diff line
@@ -71,6 +71,13 @@ static const struct rtw89_physts_regs rtw89_physts_regs_be = { 
	.dis_trigger_brk_mask = B_STS_DIS_TRIG_BY_BRK,

};



static const struct rtw89_cfo_regs rtw89_cfo_regs_be = {

	.comp = R_DCFO_WEIGHT_V1,

	.weighting_mask = B_DCFO_WEIGHT_MSK_V1,

	.comp_seg0 = R_DCFO_OPT_V1,

	.valid_0_mask = B_DCFO_OPT_EN_V1,

};



struct rtw89_byr_spec_ent_be {

	struct rtw89_rate_desc init;

	u8 num_of_idx;
@@ -636,6 +643,7 @@ const struct rtw89_phy_gen_def rtw89_phy_gen_be = { 
	.cr_base = 0x20000,

	.ccx = &rtw89_ccx_regs_be,

	.physts = &rtw89_physts_regs_be,

	.cfo = &rtw89_cfo_regs_be,



	.set_txpwr_byrate = rtw89_phy_set_txpwr_byrate_be,

	.set_txpwr_offset = rtw89_phy_set_txpwr_offset_be,

drivers/net/wireless/realtek/rtw89/reg.h

+4 −0
Original line number Diff line number Diff line
@@ -5035,6 +5035,10 @@ 
#define B_S0_DACKQ7_K GENMASK(15, 8)

#define R_S0_DACKQ8 0x5E98

#define B_S0_DACKQ8_K GENMASK(15, 8)

#define R_DCFO_WEIGHT_V1 0x6244

#define B_DCFO_WEIGHT_MSK_V1 GENMASK(31, 28)

#define R_DCFO_OPT_V1 0x6260

#define B_DCFO_OPT_EN_V1 BIT(17)

#define R_RPL_BIAS_COMP1 0x6DF0

#define B_RPL_BIAS_COMP1_MASK GENMASK(7, 0)

#define R_P1_TSSI_ALIM1 0x7630