Commit 65de3fd8 authored by Bjorn Helgaas's avatar Bjorn Helgaas
Browse files

Merge branch 'pci/config-errs' 

- Simplify config accessor error checking (Ilpo Järvinen)

* pci/config-errs:
  scsi: ipr: Do PCI error checks on own line
  PCI: xgene: Do PCI error check on own line & keep return value
  PCI: Do error check on own line to split long "if" conditions
  atm: iphase: Do PCI error checks on own line
  sh: pci: Do PCI error check on own line
  alpha: Streamline convoluted PCI error handling
parents d100de08 87576090

arch/alpha/kernel/sys_miata.c

+9 −8
Original line number Diff line number Diff line
@@ -183,16 +183,17 @@ miata_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) 
           the 2nd 8259 controller. So we have to check for it first. */



	if((slot == 7) && (PCI_FUNC(dev->devfn) == 3)) {

		u8 irq=0;

		struct pci_dev *pdev = pci_get_slot(dev->bus, dev->devfn & ~7);

		if(pdev == NULL || pci_read_config_byte(pdev, 0x40,&irq) != PCIBIOS_SUCCESSFUL) {

			pci_dev_put(pdev);

		u8 irq = 0;

		int ret;



		if (!pdev)

			return -1;

		}

		else	{



		ret = pci_read_config_byte(pdev, 0x40, &irq);

		pci_dev_put(pdev);

			return irq;

		}



		return ret == PCIBIOS_SUCCESSFUL ? irq : -1;

	}



	return COMMON_TABLE_LOOKUP;

arch/sh/drivers/pci/common.c

+6 −5
Original line number Diff line number Diff line
@@ -50,20 +50,21 @@ int __init pci_is_66mhz_capable(struct pci_channel *hose, 
				int top_bus, int current_bus)

{

	u32 pci_devfn;

	unsigned short vid;

	u16 vid;

	int cap66 = -1;

	u16 stat;

	int ret;



	pr_info("PCI: Checking 66MHz capabilities...\n");



	for (pci_devfn = 0; pci_devfn < 0xff; pci_devfn++) {

		if (PCI_FUNC(pci_devfn))

			continue;

		if (early_read_config_word(hose, top_bus, current_bus,

					   pci_devfn, PCI_VENDOR_ID, &vid) !=

		    PCIBIOS_SUCCESSFUL)

		ret = early_read_config_word(hose, top_bus, current_bus,

					     pci_devfn, PCI_VENDOR_ID, &vid);

		if (ret != PCIBIOS_SUCCESSFUL)

			continue;

		if (vid == 0xffff)

		if (PCI_POSSIBLE_ERROR(vid))

			continue;



		/* check 66MHz capability */

drivers/atm/iphase.c

+11 −9
Original line number Diff line number Diff line
@@ -2291,19 +2291,21 @@ static int get_esi(struct atm_dev *dev) 
static int reset_sar(struct atm_dev *dev)  

{  

	IADEV *iadev;  

	int i, error = 1;  

	int i, error;

	unsigned int pci[64];  

	  

	iadev = INPH_IA_DEV(dev);  

	for(i=0; i<64; i++)  

	  if ((error = pci_read_config_dword(iadev->pci,  

				i*4, &pci[i])) != PCIBIOS_SUCCESSFUL)  

	for (i = 0; i < 64; i++) {

		error = pci_read_config_dword(iadev->pci, i * 4, &pci[i]);

		if (error != PCIBIOS_SUCCESSFUL)

			return error;

	}

	writel(0, iadev->reg+IPHASE5575_EXT_RESET);  

	for(i=0; i<64; i++)  

	  if ((error = pci_write_config_dword(iadev->pci,  

					i*4, pci[i])) != PCIBIOS_SUCCESSFUL)  

	for (i = 0; i < 64; i++) {

		error = pci_write_config_dword(iadev->pci, i * 4, pci[i]);

		if (error != PCIBIOS_SUCCESSFUL)

			return error;

	}

	udelay(5);  

	return 0;  

}

drivers/pci/controller/pci-xgene.c

+4 −3
Original line number Diff line number Diff line
@@ -163,10 +163,11 @@ static int xgene_pcie_config_read32(struct pci_bus *bus, unsigned int devfn, 
				    int where, int size, u32 *val)

{

	struct xgene_pcie *port = pcie_bus_to_port(bus);

	int ret;



	if (pci_generic_config_read32(bus, devfn, where & ~0x3, 4, val) !=

	    PCIBIOS_SUCCESSFUL)

		return PCIBIOS_DEVICE_NOT_FOUND;

	ret = pci_generic_config_read32(bus, devfn, where & ~0x3, 4, val);

	if (ret != PCIBIOS_SUCCESSFUL)

		return ret;



	/*

	 * The v1 controller has a bug in its Configuration Request Retry

drivers/pci/pci.c

+6 −3
Original line number Diff line number Diff line
@@ -732,15 +732,18 @@ u16 pci_find_vsec_capability(struct pci_dev *dev, u16 vendor, int cap) 
{

	u16 vsec = 0;

	u32 header;

	int ret;



	if (vendor != dev->vendor)

		return 0;



	while ((vsec = pci_find_next_ext_capability(dev, vsec,

						     PCI_EXT_CAP_ID_VNDR))) {

		if (pci_read_config_dword(dev, vsec + PCI_VNDR_HEADER,

					  &header) == PCIBIOS_SUCCESSFUL &&

		    PCI_VNDR_HEADER_ID(header) == cap)

		ret = pci_read_config_dword(dev, vsec + PCI_VNDR_HEADER, &header);

		if (ret != PCIBIOS_SUCCESSFUL)

			continue;



		if (PCI_VNDR_HEADER_ID(header) == cap)

			return vsec;

	}