Commit 67b858dd authored by Raviteja Goud Talla's avatar Raviteja Goud Talla Committed by John Harrison
Browse files

drm/i915/gen11: Moving WAs to icl_gt_workarounds_init() 



Bspec page says "Reset: BUS", Accordingly moving w/a's:
Wa_1407352427,Wa_1406680159 to proper function icl_gt_workarounds_init()
Which will resolve guc enabling error

v2:
  - Previous patch rev2 was created by email client which caused the
    Build failure, This v2 is to resolve the previous broken series

Reviewed-by: default avatarJohn Harrison <John.C.Harrison@Intel.com>
Signed-off-by: default avatarRaviteja Goud Talla <ravitejax.goud.talla@intel.com>
Signed-off-by: default avatarJohn Harrison <John.C.Harrison@Intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211203145603.4006937-1-ravitejax.goud.talla@intel.com
parent 4b19f6b7

drivers/gpu/drm/i915/gt/intel_workarounds.c

+9 −9
Original line number Diff line number Diff line
@@ -1224,6 +1224,15 @@ icl_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal) 
		    GAMT_CHKN_BIT_REG,

		    GAMT_CHKN_DISABLE_L3_COH_PIPE);



	/* Wa_1407352427:icl,ehl */

	wa_write_or(wal, UNSLICE_UNIT_LEVEL_CLKGATE2,

		    PSDUNIT_CLKGATE_DIS);



	/* Wa_1406680159:icl,ehl */

	wa_write_or(wal,

		    SUBSLICE_UNIT_LEVEL_CLKGATE,

		    GWUNIT_CLKGATE_DIS);



	/* Wa_1607087056:icl,ehl,jsl */

	if (IS_ICELAKE(i915) ||

	    IS_JSL_EHL_GRAPHICS_STEP(i915, STEP_A0, STEP_B0))
@@ -2269,15 +2278,6 @@ rcs_engine_wa_init(struct intel_engine_cs *engine, struct i915_wa_list *wal) 
		wa_write_or(wal, UNSLICE_UNIT_LEVEL_CLKGATE,

			    VSUNIT_CLKGATE_DIS | HSUNIT_CLKGATE_DIS);



		/* Wa_1407352427:icl,ehl */

		wa_write_or(wal, UNSLICE_UNIT_LEVEL_CLKGATE2,

			    PSDUNIT_CLKGATE_DIS);



		/* Wa_1406680159:icl,ehl */

		wa_write_or(wal,

			    SUBSLICE_UNIT_LEVEL_CLKGATE,

			    GWUNIT_CLKGATE_DIS);



		/*

		 * Wa_1408767742:icl[a2..forever],ehl[all]

		 * Wa_1605460711:icl[a0..c0]