Commit 802b8320 authored by Dmitry Baryshkov's avatar Dmitry Baryshkov Committed by Bjorn Andersson
Browse files

clk: qcom: fold dispcc-sm8650 info dispcc-sm8550



There is a very minor difference between display clock controller
drivers for SM8550 and SM8650 platforms. Fold the second one into the
first one to reduce kernel footprint. The bindings for these two
hardware blocks are fully compatible.

Signed-off-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: default avatarNeil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: default avatarKonrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240717-dispcc-sm8550-fixes-v2-6-5c4a3128c40b@linaro.org


Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
parent c8bee3ff
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+2 −12
Original line number Diff line number Diff line
@@ -940,20 +940,10 @@ config SM_DISPCC_8450
config SM_DISPCC_8550
	tristate "SM8550 Display Clock Controller"
	depends on ARM64 || COMPILE_TEST
	depends on SM_GCC_8550
	depends on SM_GCC_8550 || SM_GCC_8650
	help
	  Support for the display clock controller on Qualcomm Technologies, Inc
	  SM8550 devices.
	  Say Y if you want to support display devices and functionality such as
	  splash screen.

config SM_DISPCC_8650
	tristate "SM8650 Display Clock Controller"
	depends on ARM64 || COMPILE_TEST
	select SM_GCC_8650
	help
	  Support for the display clock controller on Qualcomm Technologies, Inc
	  SM8650 devices.
	  SM8550 or SM8650 devices.
	  Say Y if you want to support display devices and functionality such as
	  splash screen.

+0 −1
Original line number Diff line number Diff line
@@ -122,7 +122,6 @@ obj-$(CONFIG_SM_DISPCC_7150) += dispcc-sm7150.o
obj-$(CONFIG_SM_DISPCC_8250) += dispcc-sm8250.o
obj-$(CONFIG_SM_DISPCC_8450) += dispcc-sm8450.o
obj-$(CONFIG_SM_DISPCC_8550) += dispcc-sm8550.o
obj-$(CONFIG_SM_DISPCC_8650) += dispcc-sm8650.o
obj-$(CONFIG_SM_GCC_4450) += gcc-sm4450.o
obj-$(CONFIG_SM_GCC_6115) += gcc-sm6115.o
obj-$(CONFIG_SM_GCC_6125) += gcc-sm6125.o
+22 −2
Original line number Diff line number Diff line
@@ -71,7 +71,7 @@ enum {
	P_SLEEP_CLK,
};

static const struct pll_vco lucid_ole_vco[] = {
static struct pll_vco lucid_ole_vco[] = {
	{ 249600000, 2000000000, 0 },
};

@@ -594,6 +594,18 @@ static const struct freq_tbl ftbl_disp_cc_mdss_mdp_clk_src[] = {
	{ }
};

static const struct freq_tbl ftbl_disp_cc_mdss_mdp_clk_src_sm8650[] = {
	F(19200000, P_BI_TCXO, 1, 0, 0),
	F(85714286, P_DISP_CC_PLL0_OUT_MAIN, 3, 0, 0),
	F(100000000, P_DISP_CC_PLL0_OUT_MAIN, 3, 0, 0),
	F(150000000, P_DISP_CC_PLL0_OUT_MAIN, 3, 0, 0),
	F(200000000, P_DISP_CC_PLL0_OUT_MAIN, 3, 0, 0),
	F(325000000, P_DISP_CC_PLL0_OUT_MAIN, 3, 0, 0),
	F(402000000, P_DISP_CC_PLL0_OUT_MAIN, 3, 0, 0),
	F(514000000, P_DISP_CC_PLL0_OUT_MAIN, 3, 0, 0),
	{ }
};

static struct clk_rcg2 disp_cc_mdss_mdp_clk_src = {
	.cmd_rcgr = 0x80d8,
	.mnd_width = 0,
@@ -1739,6 +1751,7 @@ static struct qcom_cc_desc disp_cc_sm8550_desc = {

static const struct of_device_id disp_cc_sm8550_match_table[] = {
	{ .compatible = "qcom,sm8550-dispcc" },
	{ .compatible = "qcom,sm8650-dispcc" },
	{ }
};
MODULE_DEVICE_TABLE(of, disp_cc_sm8550_match_table);
@@ -1762,6 +1775,13 @@ static int disp_cc_sm8550_probe(struct platform_device *pdev)
		goto err_put_rpm;
	}

	if (of_device_is_compatible(pdev->dev.of_node, "qcom,sm8650-dispcc")) {
		lucid_ole_vco[0].max_freq = 2100000000;
		disp_cc_mdss_mdp_clk_src.freq_tbl = ftbl_disp_cc_mdss_mdp_clk_src_sm8650;
		disp_cc_mdss_dptx1_usb_router_link_intf_clk.clkr.hw.init->parent_hws[0] =
			&disp_cc_mdss_dptx1_link_div_clk_src.clkr.hw;
	}

	clk_lucid_ole_pll_configure(&disp_cc_pll0, regmap, &disp_cc_pll0_config);
	clk_lucid_ole_pll_configure(&disp_cc_pll1, regmap, &disp_cc_pll1_config);

@@ -1795,5 +1815,5 @@ static struct platform_driver disp_cc_sm8550_driver = {

module_platform_driver(disp_cc_sm8550_driver);

MODULE_DESCRIPTION("QTI DISPCC SM8550 Driver");
MODULE_DESCRIPTION("QTI DISPCC SM8550 / SM8650  Driver");
MODULE_LICENSE("GPL");

drivers/clk/qcom/dispcc-sm8650.c

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