Unverified Commit 892f10c8 authored Nov 14, 2023 by Clément Léger Committed by Palmer Dabbelt Dec 12, 2023

dt-bindings: riscv: add Zihintntl ISA extension description

Add description for Zihintntl ISA extension[1].

Link: https://drive.google.com/file/d/13_wsN8YmRfH8YWysFyTX-DjTkCnBd9hj/view

 [1]
Signed-off-by: Clément Léger <cleger@rivosinc.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20231114141256.126749-15-cleger@rivosinc.com


Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>

parent 74ba42b2

Documentation/devicetree/bindings/riscv/extensions.yaml

+6 −0

Original line number	Diff line number	Diff line
		@@ -339,6 +339,12 @@ properties:
		The standard Zihintpause extension for pause hints, as ratified in
		commit d8ab5c7 ("Zihintpause is ratified") of the riscv-isa-manual.

		- const: zihintntl
		description:
		The standard Zihintntl extension for non-temporal locality hints, as
		ratified in commit 0dc91f5 ("Zihintntl is ratified") of the
		riscv-isa-manual.

		- const: zihpm
		description:
		The standard Zihpm extension for hardware performance counters, as