Commit 918273be authored by Anand Moon's avatar Anand Moon Committed by Neil Armstrong
Browse files

arm64: dts: amlogic: meson-axg: Add missing cache information to cpu0 



Add missing L1 data and instruction cache parameters to the CPU node 0
for the Cortex-A53 caches on the Meson AXG SoC.

Fixes: 3b6ad2a4 ("arm64: dts: amlogic: Add cache information to the Amlogic AXG SoCS")
Signed-off-by: default avatarAnand Moon <linux.amoon@gmail.com>
Link: https://patch.msgid.link/20260219103548.18392-1-linux.amoon@gmail.com


Signed-off-by: default avatarNeil Armstrong <neil.armstrong@linaro.org>
parent 28e4a49a

arch/arm64/boot/dts/amlogic/meson-axg.dtsi

+6 −0
Original line number Diff line number Diff line
@@ -72,6 +72,12 @@ cpu0: cpu@0 { 
			compatible = "arm,cortex-a53";

			reg = <0x0 0x0>;

			enable-method = "psci";

			d-cache-line-size = <32>;

			d-cache-size = <0x8000>;

			d-cache-sets = <32>;

			i-cache-line-size = <32>;

			i-cache-size = <0x8000>;

			i-cache-sets = <32>;

			next-level-cache = <&l2>;

			clocks = <&scpi_dvfs 0>;

			dynamic-power-coefficient = <140>;