Unverified Commit 96498e80 authored by Bartosz Golaszewski's avatar Bartosz Golaszewski Committed by Mark Brown
Browse files

spi: davinci: remove platform data header 



There are no longer any board files including the DaVinci SPI platform
data header. Let's move the bits and pieces that are used in the driver
into the driver .c file itself and remove the header.

Signed-off-by: default avatarBartosz Golaszewski <bartosz.golaszewski@linaro.org>
Link: https://patch.msgid.link/20251117-davinci-spi-v2-1-cd799d17f04a@linaro.org


Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent 118eb2cb

drivers/spi/spi-davinci.c

+62 −2
Original line number Diff line number Diff line
@@ -9,6 +9,7 @@ 
#include <linux/gpio/consumer.h>

#include <linux/module.h>

#include <linux/delay.h>

#include <linux/platform_data/edma.h>

#include <linux/platform_device.h>

#include <linux/err.h>

#include <linux/clk.h>
@@ -19,8 +20,6 @@ 
#include <linux/spi/spi_bitbang.h>

#include <linux/slab.h>



#include <linux/platform_data/spi-davinci.h>



#define CS_DEFAULT	0xFF



#define SPIFMT_PHASE_MASK	BIT(16)
@@ -98,8 +97,69 @@ 
#define SPIDEF		0x4c

#define SPIFMT0		0x50



#define SPI_IO_TYPE_POLL	1

#define SPI_IO_TYPE_DMA		2



#define DMA_MIN_BYTES	16



enum {

	SPI_VERSION_1, /* For DM355/DM365/DM6467 */

	SPI_VERSION_2, /* For DA8xx */

};



/**

 * struct davinci_spi_platform_data - Platform data for SPI master device on DaVinci

 *

 * @version:	version of the SPI IP. Different DaVinci devices have slightly

 *		varying versions of the same IP.

 * @num_chipselect: number of chipselects supported by this SPI master

 * @intr_line:	interrupt line used to connect the SPI IP to the ARM interrupt

 *		controller withn the SoC. Possible values are 0 and 1.

 * @prescaler_limit: max clock prescaler value

 * @cshold_bug:	set this to true if the SPI controller on your chip requires

 *		a write to CSHOLD bit in between transfers (like in DM355).

 * @dma_event_q: DMA event queue to use if SPI_IO_TYPE_DMA is used for any

 *		device on the bus.

 */

struct davinci_spi_platform_data {

	u8			version;

	u8			num_chipselect;

	u8			intr_line;

	u8			prescaler_limit;

	bool			cshold_bug;

	enum dma_event_q	dma_event_q;

};



/**

 * struct davinci_spi_config - Per-chip-select configuration for SPI slave devices

 *

 * @wdelay:	amount of delay between transmissions. Measured in number of

 *		SPI module clocks.

 * @odd_parity:	polarity of parity flag at the end of transmit data stream.

 *		0 - odd parity, 1 - even parity.

 * @parity_enable: enable transmission of parity at end of each transmit

 *		data stream.

 * @io_type:	type of IO transfer. Choose between polled, interrupt and DMA.

 * @timer_disable: disable chip-select timers (setup and hold)

 * @c2tdelay:	chip-select setup time. Measured in number of SPI module clocks.

 * @t2cdelay:	chip-select hold time. Measured in number of SPI module clocks.

 * @t2edelay:	transmit data finished to SPI ENAn pin inactive time. Measured

 *		in number of SPI clocks.

 * @c2edelay:	chip-select active to SPI ENAn signal active time. Measured in

 *		number of SPI clocks.

 */

struct davinci_spi_config {

	u8	wdelay;

	u8	odd_parity;

	u8	parity_enable;

	u8	io_type;

	u8	timer_disable;

	u8	c2tdelay;

	u8	t2cdelay;

	u8	t2edelay;

	u8	c2edelay;

};



/* SPI Controller driver's private data. */

struct davinci_spi {

	struct spi_bitbang	bitbang;

include/linux/platform_data/spi-davinci.h

deleted100644 → 0
+0 −73
Original line number Diff line number Diff line 
/* SPDX-License-Identifier: GPL-2.0-or-later */

/*

 * Copyright 2009 Texas Instruments.

 */



#ifndef __ARCH_ARM_DAVINCI_SPI_H

#define __ARCH_ARM_DAVINCI_SPI_H



#include <linux/platform_data/edma.h>



#define SPI_INTERN_CS	0xFF



enum {

	SPI_VERSION_1, /* For DM355/DM365/DM6467 */

	SPI_VERSION_2, /* For DA8xx */

};



/**

 * davinci_spi_platform_data - Platform data for SPI master device on DaVinci

 *

 * @version:	version of the SPI IP. Different DaVinci devices have slightly

 *		varying versions of the same IP.

 * @num_chipselect: number of chipselects supported by this SPI master

 * @intr_line:	interrupt line used to connect the SPI IP to the ARM interrupt

 *		controller withn the SoC. Possible values are 0 and 1.

 * @cshold_bug:	set this to true if the SPI controller on your chip requires

 *		a write to CSHOLD bit in between transfers (like in DM355).

 * @dma_event_q: DMA event queue to use if SPI_IO_TYPE_DMA is used for any

 *		device on the bus.

 */

struct davinci_spi_platform_data {

	u8			version;

	u8			num_chipselect;

	u8			intr_line;

	u8			prescaler_limit;

	bool			cshold_bug;

	enum dma_event_q	dma_event_q;

};



/**

 * davinci_spi_config - Per-chip-select configuration for SPI slave devices

 *

 * @wdelay:	amount of delay between transmissions. Measured in number of

 *		SPI module clocks.

 * @odd_parity:	polarity of parity flag at the end of transmit data stream.

 *		0 - odd parity, 1 - even parity.

 * @parity_enable: enable transmission of parity at end of each transmit

 *		data stream.

 * @io_type:	type of IO transfer. Choose between polled, interrupt and DMA.

 * @timer_disable: disable chip-select timers (setup and hold)

 * @c2tdelay:	chip-select setup time. Measured in number of SPI module clocks.

 * @t2cdelay:	chip-select hold time. Measured in number of SPI module clocks.

 * @t2edelay:	transmit data finished to SPI ENAn pin inactive time. Measured

 *		in number of SPI clocks.

 * @c2edelay:	chip-select active to SPI ENAn signal active time. Measured in

 *		number of SPI clocks.

 */

struct davinci_spi_config {

	u8	wdelay;

	u8	odd_parity;

	u8	parity_enable;

#define SPI_IO_TYPE_INTR	0

#define SPI_IO_TYPE_POLL	1

#define SPI_IO_TYPE_DMA		2

	u8	io_type;

	u8	timer_disable;

	u8	c2tdelay;

	u8	t2cdelay;

	u8	t2edelay;

	u8	c2edelay;

};



#endif	/* __ARCH_ARM_DAVINCI_SPI_H */