Commit 97216344 authored by Andi Shyti's avatar Andi Shyti
Browse files

drm/i915/gt: Limit the reserved VM space to only the platforms that need it 



Commit 9bb66c17 ("drm/i915: Reserve some kernel space per
vm") reduces the available VM space of one page in order to apply
Wa_16018031267 and Wa_16018063123.

This page was reserved indiscrimitely in all platforms even when
not needed. Limit it to DG2 onwards.

Fixes: 9bb66c17 ("drm/i915: Reserve some kernel space per vm")
Signed-off-by: default avatarAndi Shyti <andi.shyti@linux.intel.com>
Cc: Andrzej Hajda <andrzej.hajda@intel.com>
Cc: Chris Wilson <chris.p.wilson@linux.intel.com>
Cc: Jonathan Cavitt <jonathan.cavitt@intel.com>
Cc: Nirmoy Das <nirmoy.das@intel.com>
Reviewed-by: default avatarNirmoy Das <nirmoy.das@intel.com>
Acked-by: default avatarMichal Mrozek <michal.mrozek@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240327200546.640108-1-andi.shyti@linux.intel.com
parent 98850e96

drivers/gpu/drm/i915/gt/gen8_ppgtt.c

+3 −0
Original line number Diff line number Diff line
@@ -961,6 +961,9 @@ static int gen8_init_rsvd(struct i915_address_space *vm) 
	struct i915_vma *vma;

	int ret;



	if (!intel_gt_needs_wa_16018031267(vm->gt))

		return 0;



	/* The memory will be used only by GPU. */

	obj = i915_gem_object_create_lmem(i915, PAGE_SIZE,

					  I915_BO_ALLOC_VOLATILE |

drivers/gpu/drm/i915/gt/intel_gt.c

+6 −0
Original line number Diff line number Diff line
@@ -1024,6 +1024,12 @@ enum i915_map_type intel_gt_coherent_map_type(struct intel_gt *gt, 
		return I915_MAP_WC;

}



bool intel_gt_needs_wa_16018031267(struct intel_gt *gt)

{

	/* Wa_16018031267, Wa_16018063123 */

	return IS_GFX_GT_IP_RANGE(gt, IP_VER(12, 55), IP_VER(12, 71));

}



bool intel_gt_needs_wa_22016122933(struct intel_gt *gt)

{

	return MEDIA_VER_FULL(gt->i915) == IP_VER(13, 0) && gt->type == GT_MEDIA;

drivers/gpu/drm/i915/gt/intel_gt.h

+5 −4
Original line number Diff line number Diff line
@@ -82,17 +82,18 @@ struct drm_printer; 
		  ##__VA_ARGS__);					\

} while (0)



#define NEEDS_FASTCOLOR_BLT_WABB(engine) ( \

	IS_GFX_GT_IP_RANGE(engine->gt, IP_VER(12, 55), IP_VER(12, 71)) && \

	engine->class == COPY_ENGINE_CLASS && engine->instance == 0)



static inline bool gt_is_root(struct intel_gt *gt)

{

	return !gt->info.id;

}



bool intel_gt_needs_wa_16018031267(struct intel_gt *gt);

bool intel_gt_needs_wa_22016122933(struct intel_gt *gt);



#define NEEDS_FASTCOLOR_BLT_WABB(engine) ( \

	intel_gt_needs_wa_16018031267(engine->gt) && \

	engine->class == COPY_ENGINE_CLASS && engine->instance == 0)



static inline struct intel_gt *uc_to_gt(struct intel_uc *uc)

{

	return container_of(uc, struct intel_gt, uc);