Commit 97ec6cb8 authored by Matt Roper's avatar Matt Roper
Browse files

drm/xe: Consolidate workaround entries for Wa_15016589081



Wa_15016589081 applies to all graphics versions from 20.01 through 20.04
(inclusive).  Consolidate the RTP entries into a single range-based entry.

Reviewed-by: default avatarShuicheng Lin <shuicheng.lin@intel.com>
Link: https://patch.msgid.link/20260220-forupstream-wa_cleanup-v2-20-b12005a05af6@intel.com


Signed-off-by: default avatarMatt Roper <matthew.d.roper@intel.com>
parent fe681e7b
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+4 −8
Original line number Diff line number Diff line
@@ -664,6 +664,10 @@ static const struct xe_rtp_entry_sr lrc_was[] = {
	  XE_RTP_RULES(GRAPHICS_VERSION_RANGE(2001, 2004), ENGINE_CLASS(RENDER)),
	  XE_RTP_ACTIONS(SET(COMMON_SLICE_CHICKEN1, DISABLE_BOTTOM_CLIP_RECTANGLE_TEST))
	},
	{ XE_RTP_NAME("15016589081"),
	  XE_RTP_RULES(GRAPHICS_VERSION_RANGE(2001, 2004), ENGINE_CLASS(RENDER)),
	  XE_RTP_ACTIONS(SET(CHICKEN_RASTER_1, DIS_CLIP_NEGATIVE_BOUNDING_BOX))
	},

	/* DG1 */

@@ -739,10 +743,6 @@ static const struct xe_rtp_entry_sr lrc_was[] = {
			     DIS_PARTIAL_AUTOSTRIP |
			     DIS_AUTOSTRIP))
	},
	{ XE_RTP_NAME("15016589081"),
	  XE_RTP_RULES(GRAPHICS_VERSION(2004), ENGINE_CLASS(RENDER)),
	  XE_RTP_ACTIONS(SET(CHICKEN_RASTER_1, DIS_CLIP_NEGATIVE_BOUNDING_BOX))
	},

	/* Xe2_HPG */
	{ XE_RTP_NAME("15010599737"),
@@ -762,10 +762,6 @@ static const struct xe_rtp_entry_sr lrc_was[] = {
			     DIS_PARTIAL_AUTOSTRIP |
			     DIS_AUTOSTRIP))
	},
	{ XE_RTP_NAME("15016589081"),
	  XE_RTP_RULES(GRAPHICS_VERSION_RANGE(2001, 2002), ENGINE_CLASS(RENDER)),
	  XE_RTP_ACTIONS(SET(CHICKEN_RASTER_1, DIS_CLIP_NEGATIVE_BOUNDING_BOX))
	},
	{ XE_RTP_NAME("22021007897"),
	  XE_RTP_RULES(GRAPHICS_VERSION_RANGE(2001, 2002), ENGINE_CLASS(RENDER)),
	  XE_RTP_ACTIONS(SET(COMMON_SLICE_CHICKEN4, SBE_PUSH_CONSTANT_BEHIND_FIX_ENABLE))