Commit ac2b7b1e authored by Neil Armstrong's avatar Neil Armstrong Committed by Bjorn Andersson
Browse files

arm64: dts: qcom: sm8550: add QUP serial engines OPP tables 



The QUP Serial Engines requires different power domain level
depending on their working frequency, add the required OPP
table with the level associated with all possible frequencies.

For the "I2C Hub" serial engines, sinse they only support a
single Operating Point, only add a single power domain level
property.

Signed-off-by: default avatarNeil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20250115-topic-sm8x50-upstream-dt-icc-update-v1-4-eaa8b10e2af7@linaro.org


Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
parent 0acd1693

arch/arm64/boot/dts/qcom/sm8550.dtsi

+122 −0
Original line number Diff line number Diff line
@@ -348,6 +348,48 @@ mc_virt: interconnect-1 { 
		qcom,bcm-voters = <&apps_bcm_voter>;

	};



	qup_opp_table_100mhz: opp-table-qup100mhz {

		compatible = "operating-points-v2";



		opp-75000000 {

			opp-hz = /bits/ 64 <75000000>;

			required-opps = <&rpmhpd_opp_low_svs>;

		};



		opp-100000000 {

			opp-hz = /bits/ 64 <100000000>;

			required-opps = <&rpmhpd_opp_svs>;

		};

	};



	qup_opp_table_120mhz: opp-table-qup120mhz {

		compatible = "operating-points-v2";



		opp-75000000 {

			opp-hz = /bits/ 64 <75000000>;

			required-opps = <&rpmhpd_opp_low_svs>;

		};



		opp-120000000 {

			opp-hz = /bits/ 64 <120000000>;

			required-opps = <&rpmhpd_opp_svs>;

		};

	};



	qup_opp_table_125mhz: opp-table-qup125mhz {

		compatible = "operating-points-v2";



		opp-75000000 {

			opp-hz = /bits/ 64 <75000000>;

			required-opps = <&rpmhpd_opp_low_svs>;

		};



		opp-125000000 {

			opp-hz = /bits/ 64 <125000000>;

			required-opps = <&rpmhpd_opp_svs>;

		};

	};



	memory@a0000000 {

		device_type = "memory";

		/* We expect the bootloader to fill in the size */
@@ -861,6 +903,8 @@ &config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ACTIVE_ONLY>, 
				dmas = <&gpi_dma2 0 0 QCOM_GPI_I2C>,

				       <&gpi_dma2 1 0 QCOM_GPI_I2C>;

				dma-names = "tx", "rx";

				power-domains = <&rpmhpd RPMHPD_CX>;

				operating-points-v2 = <&qup_opp_table_120mhz>;

				status = "disabled";

			};
@@ -882,6 +926,8 @@ &config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ACTIVE_ONLY>, 
				dmas = <&gpi_dma2 0 0 QCOM_GPI_SPI>,

				       <&gpi_dma2 1 0 QCOM_GPI_SPI>;

				dma-names = "tx", "rx";

				power-domains = <&rpmhpd RPMHPD_CX>;

				operating-points-v2 = <&qup_opp_table_120mhz>;

				#address-cells = <1>;

				#size-cells = <0>;

				status = "disabled";
@@ -907,6 +953,8 @@ &config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ACTIVE_ONLY>, 
				dmas = <&gpi_dma2 0 1 QCOM_GPI_I2C>,

				       <&gpi_dma2 1 1 QCOM_GPI_I2C>;

				dma-names = "tx", "rx";

				power-domains = <&rpmhpd RPMHPD_CX>;

				operating-points-v2 = <&qup_opp_table_120mhz>;

				status = "disabled";

			};
@@ -928,6 +976,8 @@ &config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ACTIVE_ONLY>, 
				dmas = <&gpi_dma2 0 1 QCOM_GPI_SPI>,

				       <&gpi_dma2 1 1 QCOM_GPI_SPI>;

				dma-names = "tx", "rx";

				power-domains = <&rpmhpd RPMHPD_CX>;

				operating-points-v2 = <&qup_opp_table_120mhz>;

				#address-cells = <1>;

				#size-cells = <0>;

				status = "disabled";
@@ -953,6 +1003,8 @@ &config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ACTIVE_ONLY>, 
				dmas = <&gpi_dma2 0 2 QCOM_GPI_I2C>,

				       <&gpi_dma2 1 2 QCOM_GPI_I2C>;

				dma-names = "tx", "rx";

				power-domains = <&rpmhpd RPMHPD_CX>;

				operating-points-v2 = <&qup_opp_table_120mhz>;

				status = "disabled";

			};
@@ -974,6 +1026,8 @@ &config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ACTIVE_ONLY>, 
				dmas = <&gpi_dma2 0 2 QCOM_GPI_SPI>,

				       <&gpi_dma2 1 2 QCOM_GPI_SPI>;

				dma-names = "tx", "rx";

				power-domains = <&rpmhpd RPMHPD_CX>;

				operating-points-v2 = <&qup_opp_table_120mhz>;

				#address-cells = <1>;

				#size-cells = <0>;

				status = "disabled";
@@ -999,6 +1053,8 @@ &config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ACTIVE_ONLY>, 
				dmas = <&gpi_dma2 0 3 QCOM_GPI_I2C>,

				       <&gpi_dma2 1 3 QCOM_GPI_I2C>;

				dma-names = "tx", "rx";

				power-domains = <&rpmhpd RPMHPD_CX>;

				operating-points-v2 = <&qup_opp_table_120mhz>;

				status = "disabled";

			};
@@ -1020,6 +1076,8 @@ &config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ACTIVE_ONLY>, 
				dmas = <&gpi_dma2 0 3 QCOM_GPI_I2C>,

				       <&gpi_dma2 1 3 QCOM_GPI_I2C>;

				dma-names = "tx", "rx";

				power-domains = <&rpmhpd RPMHPD_CX>;

				operating-points-v2 = <&qup_opp_table_120mhz>;

				#address-cells = <1>;

				#size-cells = <0>;

				status = "disabled";
@@ -1045,6 +1103,8 @@ &config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ACTIVE_ONLY>, 
				dmas = <&gpi_dma2 0 4 QCOM_GPI_I2C>,

				       <&gpi_dma2 1 4 QCOM_GPI_I2C>;

				dma-names = "tx", "rx";

				power-domains = <&rpmhpd RPMHPD_CX>;

				operating-points-v2 = <&qup_opp_table_120mhz>;

				status = "disabled";

			};
@@ -1066,6 +1126,8 @@ &config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ACTIVE_ONLY>, 
				dmas = <&gpi_dma2 0 4 QCOM_GPI_I2C>,

				       <&gpi_dma2 1 4 QCOM_GPI_I2C>;

				dma-names = "tx", "rx";

				power-domains = <&rpmhpd RPMHPD_CX>;

				operating-points-v2 = <&qup_opp_table_120mhz>;

				#address-cells = <1>;

				#size-cells = <0>;

				status = "disabled";
@@ -1091,6 +1153,8 @@ &config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ACTIVE_ONLY>, 
				dmas = <&gpi_dma2 0 5 QCOM_GPI_I2C>,

				       <&gpi_dma2 1 5 QCOM_GPI_I2C>;

				dma-names = "tx", "rx";

				power-domains = <&rpmhpd RPMHPD_CX>;

				operating-points-v2 = <&qup_opp_table_120mhz>;

				status = "disabled";

			};
@@ -1112,6 +1176,8 @@ &config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ACTIVE_ONLY>, 
				dmas = <&gpi_dma2 0 5 QCOM_GPI_SPI>,

				       <&gpi_dma2 1 5 QCOM_GPI_SPI>;

				dma-names = "tx", "rx";

				power-domains = <&rpmhpd RPMHPD_CX>;

				operating-points-v2 = <&qup_opp_table_120mhz>;

				#address-cells = <1>;

				#size-cells = <0>;

				status = "disabled";
@@ -1130,6 +1196,8 @@ &clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS>, 
						<&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY

						 &config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ACTIVE_ONLY>;

				interconnect-names = "qup-core", "qup-config";

				power-domains = <&rpmhpd RPMHPD_CX>;

				operating-points-v2 = <&qup_opp_table_125mhz>;

				status = "disabled";

			};
@@ -1153,6 +1221,8 @@ &config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ACTIVE_ONLY>, 
				dmas = <&gpi_dma2 0 7 QCOM_GPI_I2C>,

				       <&gpi_dma2 1 7 QCOM_GPI_I2C>;

				dma-names = "tx", "rx";

				power-domains = <&rpmhpd RPMHPD_CX>;

				operating-points-v2 = <&qup_opp_table_100mhz>;

				status = "disabled";

			};
@@ -1174,6 +1244,8 @@ &config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ACTIVE_ONLY>, 
				dmas = <&gpi_dma2 0 7 QCOM_GPI_SPI>,

				       <&gpi_dma2 1 7 QCOM_GPI_SPI>;

				dma-names = "tx", "rx";

				power-domains = <&rpmhpd RPMHPD_CX>;

				operating-points-v2 = <&qup_opp_table_100mhz>;

				#address-cells = <1>;

				#size-cells = <0>;

				status = "disabled";
@@ -1206,6 +1278,8 @@ &clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS>, 
						<&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY

						 &config_noc SLAVE_I2C QCOM_ICC_TAG_ACTIVE_ONLY>;

				interconnect-names = "qup-core", "qup-config";

				power-domains = <&rpmhpd RPMHPD_CX>;

				required-opps = <&rpmhpd_opp_low_svs>;

				status = "disabled";

			};
@@ -1225,6 +1299,8 @@ &clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS>, 
						<&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY

						 &config_noc SLAVE_I2C QCOM_ICC_TAG_ACTIVE_ONLY>;

				interconnect-names = "qup-core", "qup-config";

				power-domains = <&rpmhpd RPMHPD_CX>;

				required-opps = <&rpmhpd_opp_low_svs>;

				status = "disabled";

			};
@@ -1244,6 +1320,8 @@ &clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS>, 
						<&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY

						 &config_noc SLAVE_I2C QCOM_ICC_TAG_ACTIVE_ONLY>;

				interconnect-names = "qup-core", "qup-config";

				power-domains = <&rpmhpd RPMHPD_CX>;

				required-opps = <&rpmhpd_opp_low_svs>;

				status = "disabled";

			};
@@ -1263,6 +1341,8 @@ &clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS>, 
						<&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY

						 &config_noc SLAVE_I2C QCOM_ICC_TAG_ACTIVE_ONLY>;

				interconnect-names = "qup-core", "qup-config";

				power-domains = <&rpmhpd RPMHPD_CX>;

				required-opps = <&rpmhpd_opp_low_svs>;

				status = "disabled";

			};
@@ -1282,6 +1362,8 @@ &clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS>, 
						<&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY

						 &config_noc SLAVE_I2C QCOM_ICC_TAG_ACTIVE_ONLY>;

				interconnect-names = "qup-core", "qup-config";

				power-domains = <&rpmhpd RPMHPD_CX>;

				required-opps = <&rpmhpd_opp_low_svs>;

				status = "disabled";

			};
@@ -1301,6 +1383,8 @@ &clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS>, 
						<&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY

						 &config_noc SLAVE_I2C QCOM_ICC_TAG_ACTIVE_ONLY>;

				interconnect-names = "qup-core", "qup-config";

				power-domains = <&rpmhpd RPMHPD_CX>;

				required-opps = <&rpmhpd_opp_low_svs>;

				status = "disabled";

			};
@@ -1320,6 +1404,8 @@ &clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS>, 
						<&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY

						 &config_noc SLAVE_I2C QCOM_ICC_TAG_ACTIVE_ONLY>;

				interconnect-names = "qup-core", "qup-config";

				power-domains = <&rpmhpd RPMHPD_CX>;

				required-opps = <&rpmhpd_opp_low_svs>;

				status = "disabled";

			};
@@ -1339,6 +1425,8 @@ &clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS>, 
						<&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY

						 &config_noc SLAVE_I2C QCOM_ICC_TAG_ACTIVE_ONLY>;

				interconnect-names = "qup-core", "qup-config";

				power-domains = <&rpmhpd RPMHPD_CX>;

				required-opps = <&rpmhpd_opp_low_svs>;

				status = "disabled";

			};
@@ -1358,6 +1446,8 @@ &clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS>, 
						<&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY

						 &config_noc SLAVE_I2C QCOM_ICC_TAG_ACTIVE_ONLY>;

				interconnect-names = "qup-core", "qup-config";

				power-domains = <&rpmhpd RPMHPD_CX>;

				required-opps = <&rpmhpd_opp_low_svs>;

				status = "disabled";

			};
@@ -1377,6 +1467,8 @@ &clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS>, 
						<&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY

						 &config_noc SLAVE_I2C QCOM_ICC_TAG_ACTIVE_ONLY>;

				interconnect-names = "qup-core", "qup-config";

				power-domains = <&rpmhpd RPMHPD_CX>;

				required-opps = <&rpmhpd_opp_low_svs>;

				status = "disabled";

			};

		};
@@ -1440,6 +1532,8 @@ &config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ACTIVE_ONLY>, 
				dmas = <&gpi_dma1 0 0 QCOM_GPI_I2C>,

				       <&gpi_dma1 1 0 QCOM_GPI_I2C>;

				dma-names = "tx", "rx";

				power-domains = <&rpmhpd RPMHPD_CX>;

				operating-points-v2 = <&qup_opp_table_120mhz>;

				status = "disabled";

			};
@@ -1461,6 +1555,8 @@ &config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ACTIVE_ONLY>, 
				dmas = <&gpi_dma1 0 0 QCOM_GPI_SPI>,

				       <&gpi_dma1 1 0 QCOM_GPI_SPI>;

				dma-names = "tx", "rx";

				power-domains = <&rpmhpd RPMHPD_CX>;

				operating-points-v2 = <&qup_opp_table_120mhz>;

				#address-cells = <1>;

				#size-cells = <0>;

				status = "disabled";
@@ -1486,6 +1582,8 @@ &config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ACTIVE_ONLY>, 
				dmas = <&gpi_dma1 0 1 QCOM_GPI_I2C>,

				       <&gpi_dma1 1 1 QCOM_GPI_I2C>;

				dma-names = "tx", "rx";

				power-domains = <&rpmhpd RPMHPD_CX>;

				operating-points-v2 = <&qup_opp_table_120mhz>;

				status = "disabled";

			};
@@ -1507,6 +1605,8 @@ &config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ACTIVE_ONLY>, 
				dmas = <&gpi_dma1 0 1 QCOM_GPI_SPI>,

				       <&gpi_dma1 1 1 QCOM_GPI_SPI>;

				dma-names = "tx", "rx";

				power-domains = <&rpmhpd RPMHPD_CX>;

				operating-points-v2 = <&qup_opp_table_120mhz>;

				#address-cells = <1>;

				#size-cells = <0>;

				status = "disabled";
@@ -1532,6 +1632,8 @@ &config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ACTIVE_ONLY>, 
				dmas = <&gpi_dma1 0 2 QCOM_GPI_I2C>,

				       <&gpi_dma1 1 2 QCOM_GPI_I2C>;

				dma-names = "tx", "rx";

				power-domains = <&rpmhpd RPMHPD_CX>;

				operating-points-v2 = <&qup_opp_table_100mhz>;

				status = "disabled";

			};
@@ -1553,6 +1655,8 @@ &config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ACTIVE_ONLY>, 
				dmas = <&gpi_dma1 0 2 QCOM_GPI_SPI>,

				       <&gpi_dma1 1 2 QCOM_GPI_SPI>;

				dma-names = "tx", "rx";

				power-domains = <&rpmhpd RPMHPD_CX>;

				operating-points-v2 = <&qup_opp_table_100mhz>;

				#address-cells = <1>;

				#size-cells = <0>;

				status = "disabled";
@@ -1578,6 +1682,8 @@ &config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ACTIVE_ONLY>, 
				dmas = <&gpi_dma1 0 3 QCOM_GPI_I2C>,

				       <&gpi_dma1 1 3 QCOM_GPI_I2C>;

				dma-names = "tx", "rx";

				power-domains = <&rpmhpd RPMHPD_CX>;

				operating-points-v2 = <&qup_opp_table_100mhz>;

				status = "disabled";

			};
@@ -1599,6 +1705,8 @@ &config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ACTIVE_ONLY>, 
				dmas = <&gpi_dma1 0 3 QCOM_GPI_SPI>,

				       <&gpi_dma1 1 3 QCOM_GPI_SPI>;

				dma-names = "tx", "rx";

				power-domains = <&rpmhpd RPMHPD_CX>;

				operating-points-v2 = <&qup_opp_table_100mhz>;

				#address-cells = <1>;

				#size-cells = <0>;

				status = "disabled";
@@ -1624,6 +1732,8 @@ &config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ACTIVE_ONLY>, 
				dmas = <&gpi_dma1 0 4 QCOM_GPI_I2C>,

				       <&gpi_dma1 1 4 QCOM_GPI_I2C>;

				dma-names = "tx", "rx";

				power-domains = <&rpmhpd RPMHPD_CX>;

				operating-points-v2 = <&qup_opp_table_100mhz>;

				status = "disabled";

			};
@@ -1645,6 +1755,8 @@ &config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ACTIVE_ONLY>, 
				dmas = <&gpi_dma1 0 4 QCOM_GPI_SPI>,

				       <&gpi_dma1 1 4 QCOM_GPI_SPI>;

				dma-names = "tx", "rx";

				power-domains = <&rpmhpd RPMHPD_CX>;

				operating-points-v2 = <&qup_opp_table_100mhz>;

				#address-cells = <1>;

				#size-cells = <0>;

				status = "disabled";
@@ -1668,6 +1780,8 @@ &config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ACTIVE_ONLY>, 
				dmas = <&gpi_dma1 0 5 QCOM_GPI_I2C>,

				       <&gpi_dma1 1 5 QCOM_GPI_I2C>;

				dma-names = "tx", "rx";

				power-domains = <&rpmhpd RPMHPD_CX>;

				operating-points-v2 = <&qup_opp_table_100mhz>;

				#address-cells = <1>;

				#size-cells = <0>;

				status = "disabled";
@@ -1691,6 +1805,8 @@ &config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ACTIVE_ONLY>, 
				dmas = <&gpi_dma1 0 5 QCOM_GPI_SPI>,

				       <&gpi_dma1 1 5 QCOM_GPI_SPI>;

				dma-names = "tx", "rx";

				power-domains = <&rpmhpd RPMHPD_CX>;

				operating-points-v2 = <&qup_opp_table_100mhz>;

				#address-cells = <1>;

				#size-cells = <0>;

				status = "disabled";
@@ -1714,6 +1830,8 @@ &config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ACTIVE_ONLY>, 
				dmas = <&gpi_dma1 0 6 QCOM_GPI_I2C>,

				       <&gpi_dma1 1 6 QCOM_GPI_I2C>;

				dma-names = "tx", "rx";

				power-domains = <&rpmhpd RPMHPD_CX>;

				operating-points-v2 = <&qup_opp_table_100mhz>;

				#address-cells = <1>;

				#size-cells = <0>;

				status = "disabled";
@@ -1737,6 +1855,8 @@ &config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ACTIVE_ONLY>, 
				dmas = <&gpi_dma1 0 6 QCOM_GPI_SPI>,

				       <&gpi_dma1 1 6 QCOM_GPI_SPI>;

				dma-names = "tx", "rx";

				power-domains = <&rpmhpd RPMHPD_CX>;

				operating-points-v2 = <&qup_opp_table_100mhz>;

				#address-cells = <1>;

				#size-cells = <0>;

				status = "disabled";
@@ -1755,6 +1875,8 @@ uart7: serial@a9c000 { 
						 &clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS>,

						<&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY

						 &config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ACTIVE_ONLY>;

				power-domains = <&rpmhpd RPMHPD_CX>;

				operating-points-v2 = <&qup_opp_table_100mhz>;

				status = "disabled";

			};

		};