Commit ac49797c authored by Lizhi Hou's avatar Lizhi Hou Committed by Jeff Hugo
Browse files

accel/amdxdna: Add GEM buffer object management 



There different types of BOs are supported:

- shmem
A user application uses shmem BOs as input/output for its workload running
on NPU.

- device memory heap
The fixed size buffer dedicated to the device.

- device buffer
The buffer object allocated from device memory heap.

- command buffer
The buffer object created for delivering commands. The command buffer
object is small and pinned on creation.

New IOCTLs are added: CREATE_BO, GET_BO_INFO, SYNC_BO. SYNC_BO is used
to explicitly flush CPU cache for BO memory.

Co-developed-by: default avatarMin Ma <min.ma@amd.com>
Signed-off-by: default avatarMin Ma <min.ma@amd.com>
Reviewed-by: default avatarJeffrey Hugo <quic_jhugo@quicinc.com>
Signed-off-by: default avatarLizhi Hou <lizhi.hou@amd.com>
Signed-off-by: default avatarJeffrey Hugo <quic_jhugo@quicinc.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241118172942.2014541-7-lizhi.hou@amd.com
parent be462c97

drivers/accel/amdxdna/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -8,6 +8,7 @@ amdxdna-y := \ 
	aie2_smu.o \

	aie2_solver.o \

	amdxdna_ctx.o \

	amdxdna_gem.o \

	amdxdna_mailbox.o \

	amdxdna_mailbox_helper.o \

	amdxdna_pci_drv.o \

drivers/accel/amdxdna/aie2_ctx.c

+84 −1
Original line number Diff line number Diff line
@@ -5,12 +5,15 @@ 


#include <drm/amdxdna_accel.h>

#include <drm/drm_device.h>

#include <drm/drm_gem.h>

#include <drm/drm_gem_shmem_helper.h>

#include <drm/drm_print.h>

#include <linux/types.h>



#include "aie2_pci.h"

#include "aie2_solver.h"

#include "amdxdna_ctx.h"

#include "amdxdna_gem.h"

#include "amdxdna_mailbox.h"

#include "amdxdna_pci_drv.h"
@@ -128,6 +131,7 @@ int aie2_hwctx_init(struct amdxdna_hwctx *hwctx) 
	struct amdxdna_client *client = hwctx->client;

	struct amdxdna_dev *xdna = client->xdna;

	struct amdxdna_hwctx_priv *priv;

	struct amdxdna_gem_obj *heap;

	int ret;



	priv = kzalloc(sizeof(*hwctx->priv), GFP_KERNEL);
@@ -135,10 +139,28 @@ int aie2_hwctx_init(struct amdxdna_hwctx *hwctx) 
		return -ENOMEM;

	hwctx->priv = priv;



	mutex_lock(&client->mm_lock);

	heap = client->dev_heap;

	if (!heap) {

		XDNA_ERR(xdna, "The client dev heap object not exist");

		mutex_unlock(&client->mm_lock);

		ret = -ENOENT;

		goto free_priv;

	}

	drm_gem_object_get(to_gobj(heap));

	mutex_unlock(&client->mm_lock);

	priv->heap = heap;



	ret = amdxdna_gem_pin(heap);

	if (ret) {

		XDNA_ERR(xdna, "Dev heap pin failed, ret %d", ret);

		goto put_heap;

	}



	ret = aie2_hwctx_col_list(hwctx);

	if (ret) {

		XDNA_ERR(xdna, "Create col list failed, ret %d", ret);

		goto free_priv;

		goto unpin;

	}



	ret = aie2_alloc_resource(hwctx);
@@ -147,14 +169,26 @@ int aie2_hwctx_init(struct amdxdna_hwctx *hwctx) 
		goto free_col_list;

	}



	ret = aie2_map_host_buf(xdna->dev_handle, hwctx->fw_ctx_id,

				heap->mem.userptr, heap->mem.size);

	if (ret) {

		XDNA_ERR(xdna, "Map host buffer failed, ret %d", ret);

		goto release_resource;

	}

	hwctx->status = HWCTX_STAT_INIT;



	XDNA_DBG(xdna, "hwctx %s init completed", hwctx->name);



	return 0;



release_resource:

	aie2_release_resource(hwctx);

free_col_list:

	kfree(hwctx->col_list);

unpin:

	amdxdna_gem_unpin(heap);

put_heap:

	drm_gem_object_put(to_gobj(heap));

free_priv:

	kfree(priv);

	return ret;
@@ -164,11 +198,59 @@ void aie2_hwctx_fini(struct amdxdna_hwctx *hwctx) 
{

	aie2_release_resource(hwctx);



	amdxdna_gem_unpin(hwctx->priv->heap);

	drm_gem_object_put(to_gobj(hwctx->priv->heap));



	kfree(hwctx->col_list);

	kfree(hwctx->priv);

	kfree(hwctx->cus);

}



static int aie2_hwctx_cu_config(struct amdxdna_hwctx *hwctx, void *buf, u32 size)

{

	struct amdxdna_hwctx_param_config_cu *config = buf;

	struct amdxdna_dev *xdna = hwctx->client->xdna;

	u32 total_size;

	int ret;



	XDNA_DBG(xdna, "Config %d CU to %s", config->num_cus, hwctx->name);

	if (hwctx->status != HWCTX_STAT_INIT) {

		XDNA_ERR(xdna, "Not support re-config CU");

		return -EINVAL;

	}



	if (!config->num_cus) {

		XDNA_ERR(xdna, "Number of CU is zero");

		return -EINVAL;

	}



	total_size = struct_size(config, cu_configs, config->num_cus);

	if (total_size > size) {

		XDNA_ERR(xdna, "CU config larger than size");

		return -EINVAL;

	}



	hwctx->cus = kmemdup(config, total_size, GFP_KERNEL);

	if (!hwctx->cus)

		return -ENOMEM;



	ret = aie2_config_cu(hwctx);

	if (ret) {

		XDNA_ERR(xdna, "Config CU to firmware failed, ret %d", ret);

		goto free_cus;

	}



	wmb(); /* To avoid locking in command submit when check status */

	hwctx->status = HWCTX_STAT_READY;



	return 0;



free_cus:

	kfree(hwctx->cus);

	hwctx->cus = NULL;

	return ret;

}



int aie2_hwctx_config(struct amdxdna_hwctx *hwctx, u32 type, u64 value, void *buf, u32 size)

{

	struct amdxdna_dev *xdna = hwctx->client->xdna;
@@ -176,6 +258,7 @@ int aie2_hwctx_config(struct amdxdna_hwctx *hwctx, u32 type, u64 value, void *bu 
	drm_WARN_ON(&xdna->ddev, !mutex_is_locked(&xdna->dev_lock));

	switch (type) {

	case DRM_AMDXDNA_HWCTX_CONFIG_CU:

		return aie2_hwctx_cu_config(hwctx, buf, size);

	case DRM_AMDXDNA_HWCTX_ASSIGN_DBG_BUF:

	case DRM_AMDXDNA_HWCTX_REMOVE_DBG_BUF:

		return -EOPNOTSUPP;

drivers/accel/amdxdna/aie2_message.c

+80 −0
Original line number Diff line number Diff line
@@ -5,7 +5,10 @@ 


#include <drm/amdxdna_accel.h>

#include <drm/drm_device.h>

#include <drm/drm_gem.h>

#include <drm/drm_gem_shmem_helper.h>

#include <drm/drm_print.h>

#include <linux/bitfield.h>

#include <linux/errno.h>

#include <linux/pci.h>

#include <linux/types.h>
@@ -13,6 +16,7 @@ 
#include "aie2_msg_priv.h"

#include "aie2_pci.h"

#include "amdxdna_ctx.h"

#include "amdxdna_gem.h"

#include "amdxdna_mailbox.h"

#include "amdxdna_mailbox_helper.h"

#include "amdxdna_pci_drv.h"
@@ -282,3 +286,79 @@ int aie2_destroy_context(struct amdxdna_dev_hdl *ndev, struct amdxdna_hwctx *hwc 


	return ret;

}



int aie2_map_host_buf(struct amdxdna_dev_hdl *ndev, u32 context_id, u64 addr, u64 size)

{

	DECLARE_AIE2_MSG(map_host_buffer, MSG_OP_MAP_HOST_BUFFER);

	struct amdxdna_dev *xdna = ndev->xdna;

	int ret;



	req.context_id = context_id;

	req.buf_addr = addr;

	req.buf_size = size;

	ret = aie2_send_mgmt_msg_wait(ndev, &msg);

	if (ret)

		return ret;



	XDNA_DBG(xdna, "fw ctx %d map host buf addr 0x%llx size 0x%llx",

		 context_id, addr, size);



	return 0;

}



int aie2_config_cu(struct amdxdna_hwctx *hwctx)

{

	struct mailbox_channel *chann = hwctx->priv->mbox_chann;

	struct amdxdna_dev *xdna = hwctx->client->xdna;

	u32 shift = xdna->dev_info->dev_mem_buf_shift;

	DECLARE_AIE2_MSG(config_cu, MSG_OP_CONFIG_CU);

	struct drm_gem_object *gobj;

	struct amdxdna_gem_obj *abo;

	int ret, i;



	if (!chann)

		return -ENODEV;



	if (hwctx->cus->num_cus > MAX_NUM_CUS) {

		XDNA_DBG(xdna, "Exceed maximum CU %d", MAX_NUM_CUS);

		return -EINVAL;

	}



	for (i = 0; i < hwctx->cus->num_cus; i++) {

		struct amdxdna_cu_config *cu = &hwctx->cus->cu_configs[i];



		gobj = drm_gem_object_lookup(hwctx->client->filp, cu->cu_bo);

		if (!gobj) {

			XDNA_ERR(xdna, "Lookup GEM object failed");

			return -EINVAL;

		}

		abo = to_xdna_obj(gobj);



		if (abo->type != AMDXDNA_BO_DEV) {

			drm_gem_object_put(gobj);

			XDNA_ERR(xdna, "Invalid BO type");

			return -EINVAL;

		}



		req.cfgs[i] = FIELD_PREP(AIE2_MSG_CFG_CU_PDI_ADDR,

					 abo->mem.dev_addr >> shift);

		req.cfgs[i] |= FIELD_PREP(AIE2_MSG_CFG_CU_FUNC, cu->cu_func);

		XDNA_DBG(xdna, "CU %d full addr 0x%llx, cfg 0x%x", i,

			 abo->mem.dev_addr, req.cfgs[i]);

		drm_gem_object_put(gobj);

	}

	req.num_cus = hwctx->cus->num_cus;



	ret = xdna_send_msg_wait(xdna, chann, &msg);

	if (ret == -ETIME)

		aie2_destroy_context(xdna->dev_handle, hwctx);



	if (resp.status == AIE2_STATUS_SUCCESS) {

		XDNA_DBG(xdna, "Configure %d CUs, ret %d", req.num_cus, ret);

		return 0;

	}



	XDNA_ERR(xdna, "Command opcode 0x%x failed, status 0x%x ret %d",

		 msg.opcode, resp.status, ret);

	return ret;

}

drivers/accel/amdxdna/aie2_pci.h

+3 −0
Original line number Diff line number Diff line
@@ -119,6 +119,7 @@ struct rt_config { 
};



struct amdxdna_hwctx_priv {

	struct amdxdna_gem_obj		*heap;

	void				*mbox_chann;

};
@@ -196,6 +197,8 @@ int aie2_query_firmware_version(struct amdxdna_dev_hdl *ndev, 
				struct amdxdna_fw_ver *fw_ver);

int aie2_create_context(struct amdxdna_dev_hdl *ndev, struct amdxdna_hwctx *hwctx);

int aie2_destroy_context(struct amdxdna_dev_hdl *ndev, struct amdxdna_hwctx *hwctx);

int aie2_map_host_buf(struct amdxdna_dev_hdl *ndev, u32 context_id, u64 addr, u64 size);

int aie2_config_cu(struct amdxdna_hwctx *hwctx);



/* aie2_hwctx.c */

int aie2_hwctx_init(struct amdxdna_hwctx *hwctx);

drivers/accel/amdxdna/amdxdna_ctx.h

+10 −0
Original line number Diff line number Diff line
@@ -6,6 +6,16 @@ 
#ifndef _AMDXDNA_CTX_H_

#define _AMDXDNA_CTX_H_



/* Exec buffer command header format */

#define AMDXDNA_CMD_STATE		GENMASK(3, 0)

#define AMDXDNA_CMD_EXTRA_CU_MASK	GENMASK(11, 10)

#define AMDXDNA_CMD_COUNT		GENMASK(22, 12)

#define AMDXDNA_CMD_OPCODE		GENMASK(27, 23)

struct amdxdna_cmd {

	u32 header;

	u32 data[];

};



struct amdxdna_hwctx {

	struct amdxdna_client		*client;

	struct amdxdna_hwctx_priv	*priv;