Commit b4ab605e authored by Quan Zhou's avatar Quan Zhou Committed by Anup Patel
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KVM: riscv: selftests: Add bfloat16 extension to get-reg-list test 



The KVM RISC-V allows Zfbfmin/Zvfbfmin/Zvfbfwma extensions for Guest/VM
so add them to get-reg-list test.

Signed-off-by: default avatarQuan Zhou <zhouquan@iscas.ac.cn>
Reviewed-by: default avatarAndrew Jones <ajones@ventanamicro.com>
Reviewed-by: default avatarNutty Liu <nutty.liu@hotmail.com>
Reviewed-by: default avatarNutty Liu <liujingqi@lanxincomputing.com>
Link: https://lore.kernel.org/r/40e52ff7053401a2fcb206e75f45ebc8557fc28b.1754646071.git.zhouquan@iscas.ac.cn


Signed-off-by: default avatarAnup Patel <anup@brainfault.org>
parent e677fab8

tools/testing/selftests/kvm/riscv/get-reg-list.c

+12 −0
Original line number Diff line number Diff line
@@ -80,6 +80,7 @@ bool filter_reg(__u64 reg) 
	case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZCF:

	case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZCMOP:

	case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZFA:

	case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZFBFMIN:

	case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZFH:

	case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZFHMIN:

	case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZICBOM:
@@ -104,6 +105,8 @@ bool filter_reg(__u64 reg) 
	case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZTSO:

	case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZVBB:

	case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZVBC:

	case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZVFBFMIN:

	case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZVFBFWMA:

	case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZVFH:

	case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZVFHMIN:

	case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZVKB:
@@ -535,6 +538,7 @@ static const char *isa_ext_single_id_to_str(__u64 reg_off) 
		KVM_ISA_EXT_ARR(ZCF),

		KVM_ISA_EXT_ARR(ZCMOP),

		KVM_ISA_EXT_ARR(ZFA),

		KVM_ISA_EXT_ARR(ZFBFMIN),

		KVM_ISA_EXT_ARR(ZFH),

		KVM_ISA_EXT_ARR(ZFHMIN),

		KVM_ISA_EXT_ARR(ZICBOM),
@@ -559,6 +563,8 @@ static const char *isa_ext_single_id_to_str(__u64 reg_off) 
		KVM_ISA_EXT_ARR(ZTSO),

		KVM_ISA_EXT_ARR(ZVBB),

		KVM_ISA_EXT_ARR(ZVBC),

		KVM_ISA_EXT_ARR(ZVFBFMIN),

		KVM_ISA_EXT_ARR(ZVFBFWMA),

		KVM_ISA_EXT_ARR(ZVFH),

		KVM_ISA_EXT_ARR(ZVFHMIN),

		KVM_ISA_EXT_ARR(ZVKB),
@@ -1141,6 +1147,7 @@ KVM_ISA_EXT_SIMPLE_CONFIG(zcd, ZCD); 
KVM_ISA_EXT_SIMPLE_CONFIG(zcf, ZCF);

KVM_ISA_EXT_SIMPLE_CONFIG(zcmop, ZCMOP);

KVM_ISA_EXT_SIMPLE_CONFIG(zfa, ZFA);

KVM_ISA_EXT_SIMPLE_CONFIG(zfbfmin, ZFBFMIN);

KVM_ISA_EXT_SIMPLE_CONFIG(zfh, ZFH);

KVM_ISA_EXT_SIMPLE_CONFIG(zfhmin, ZFHMIN);

KVM_ISA_EXT_SUBLIST_CONFIG(zicbom, ZICBOM);
@@ -1165,6 +1172,8 @@ KVM_ISA_EXT_SIMPLE_CONFIG(zkt, ZKT); 
KVM_ISA_EXT_SIMPLE_CONFIG(ztso, ZTSO);

KVM_ISA_EXT_SIMPLE_CONFIG(zvbb, ZVBB);

KVM_ISA_EXT_SIMPLE_CONFIG(zvbc, ZVBC);

KVM_ISA_EXT_SIMPLE_CONFIG(zvfbfmin, ZVFBFMIN);

KVM_ISA_EXT_SIMPLE_CONFIG(zvfbfwma, ZVFBFWMA);

KVM_ISA_EXT_SIMPLE_CONFIG(zvfh, ZVFH);

KVM_ISA_EXT_SIMPLE_CONFIG(zvfhmin, ZVFHMIN);

KVM_ISA_EXT_SIMPLE_CONFIG(zvkb, ZVKB);
@@ -1216,6 +1225,7 @@ struct vcpu_reg_list *vcpu_configs[] = { 
	&config_zcf,

	&config_zcmop,

	&config_zfa,

	&config_zfbfmin,

	&config_zfh,

	&config_zfhmin,

	&config_zicbom,
@@ -1240,6 +1250,8 @@ struct vcpu_reg_list *vcpu_configs[] = { 
	&config_ztso,

	&config_zvbb,

	&config_zvbc,

	&config_zvfbfmin,

	&config_zvfbfwma,

	&config_zvfh,

	&config_zvfhmin,

	&config_zvkb,