Commit bbb1999a authored by Rob Herring (Arm)'s avatar Rob Herring (Arm)
Browse files

dt-bindings: interrupt-controller: Convert marvell,odmi-controller to DT schema 

Convert the Marvell On-Die Message interrupt controller binding to
schema format.

Drop the 'interrupt-controller' property which isn't relevant for an MSI
controller.

Link: https://lore.kernel.org/r/20250505144727.1290271-1-robh@kernel.org


Signed-off-by: default avatarRob Herring (Arm) <robh@kernel.org>
parent 26c70ec8

Documentation/devicetree/bindings/interrupt-controller/marvell,odmi-controller.txt

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* Marvell ODMI for MSI support



Some Marvell SoCs have an On-Die Message Interrupt (ODMI) controller

which can be used by on-board peripheral for MSI interrupts.



Required properties:



- compatible           : The value here should contain:



    "marvell,ap806-odmi-controller", "marvell,odmi-controller".



- interrupt,controller : Identifies the node as an interrupt controller.



- msi-controller       : Identifies the node as an MSI controller.



- marvell,odmi-frames  : Number of ODMI frames available. Each frame

                         provides a number of events.



- reg                  : List of register definitions, one for each

                         ODMI frame.



- marvell,spi-base     : List of GIC base SPI interrupts, one for each

                         ODMI frame. Those SPI interrupts are 0-based,

                         i.e marvell,spi-base = <128> will use SPI #96.

                         See Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml

                         for details about the GIC Device Tree binding.



Example:



	odmi: odmi@300000 {

		compatible = "marvell,ap806-odmi-controller",

			     "marvell,odmi-controller";

		interrupt-controller;

		msi-controller;

		marvell,odmi-frames = <4>;

		reg = <0x300000 0x4000>,

		      <0x304000 0x4000>,

		      <0x308000 0x4000>,

		      <0x30C000 0x4000>;

		marvell,spi-base = <128>, <136>, <144>, <152>;

	};

Documentation/devicetree/bindings/interrupt-controller/marvell,odmi-controller.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/interrupt-controller/marvell,odmi-controller.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Marvell ODMI controller



maintainers:

  - Thomas Petazzoni <thomas.petazzoni@free-electrons.com>



description:

  Some Marvell SoCs have an On-Die Message Interrupt (ODMI) controller which can

  be used by on-board peripherals for MSI interrupts.



properties:

  compatible:

    const: marvell,odmi-controller



  reg:

    description: List of register definitions, one for each ODMI frame.



  msi-controller: true



  marvell,odmi-frames:

    description: Number of ODMI frames available. Each frame provides a number of events.

    $ref: /schemas/types.yaml#/definitions/uint32



  marvell,spi-base:

    description: >

      List of GIC base SPI interrupts, one for each ODMI frame. Those SPI

      interrupts are 0-based, i.e. marvell,spi-base = <128> will use SPI #96.

      See Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml

      for details.

    $ref: /schemas/types.yaml#/definitions/uint32-array



required:

  - compatible

  - reg

  - msi-controller

  - marvell,odmi-frames

  - marvell,spi-base



additionalProperties: false



examples:

  - |

    msi-controller@300000 {

        compatible = "marvell,odmi-controller";

        msi-controller;

        marvell,odmi-frames = <4>;

        reg = <0x300000 0x4000>, <0x304000 0x4000>, <0x308000 0x4000>, <0x30C000 0x4000>;

        marvell,spi-base = <128>, <136>, <144>, <152>;

    };