Commit c0516eb4 authored by Thanh Quan's avatar Thanh Quan Committed by Geert Uytterhoeven
Browse files

clk: renesas: r8a779h0: Add timer clocks 



Add the module clocks used by Timer (CMT/TMU) blocks on the Renesas
R-Car V4M (R8A779H0) SoC.

Signed-off-by: default avatarThanh Quan <thanh.quan.xn@renesas.com>
Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: default avatarWolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/79a66e8ff84378d7f65d5f55cfb01b9b745edd12.1712068639.git.geert+renesas@glider.be
parent 9c851585

drivers/clk/renesas/r8a779h0-cpg-mssr.c

+9 −0
Original line number Diff line number Diff line
@@ -192,7 +192,16 @@ static const struct mssr_mod_clk r8a779h0_mod_clks[] = { 
	DEF_MOD("sdhi0",	706,	R8A779H0_CLK_SD0),

	DEF_MOD("sydm1",	709,	R8A779H0_CLK_S0D6_PER),

	DEF_MOD("sydm2",	710,	R8A779H0_CLK_S0D6_PER),

	DEF_MOD("tmu0",		713,	R8A779H0_CLK_SASYNCRT),

	DEF_MOD("tmu1",		714,	R8A779H0_CLK_SASYNCPERD2),

	DEF_MOD("tmu2",		715,	R8A779H0_CLK_SASYNCPERD2),

	DEF_MOD("tmu3",		716,	R8A779H0_CLK_SASYNCPERD2),

	DEF_MOD("tmu4",		717,	R8A779H0_CLK_SASYNCPERD2),

	DEF_MOD("wdt1:wdt0",	907,	R8A779H0_CLK_R),

	DEF_MOD("cmt0",		910,	R8A779H0_CLK_R),

	DEF_MOD("cmt1",		911,	R8A779H0_CLK_R),

	DEF_MOD("cmt2",		912,	R8A779H0_CLK_R),

	DEF_MOD("cmt3",		913,	R8A779H0_CLK_R),

	DEF_MOD("pfc0",		915,	R8A779H0_CLK_CP),

	DEF_MOD("pfc1",		916,	R8A779H0_CLK_CP),

	DEF_MOD("pfc2",		917,	R8A779H0_CLK_CP),