Commit c4277d21 authored by Heiner Kallweit's avatar Heiner Kallweit Committed by Jakub Kicinski
Browse files

net: phy: realtek: add dummy PHY driver for RTL8127ATF 



RTL8127ATF supports a SFP+ port for fiber modules (10GBASE-SR/LR/ER/ZR and
DAC). The list of supported modes was provided by Realtek. According to the
r8127 vendor driver also 1G modules are supported, but this needs some more
complexity in the driver, and only 10G mode has been tested so far.
Therefore mainline support will be limited to 10G for now.
The SFP port signals are hidden in the chip IP and driven by firmware.
Therefore mainline SFP support can't be used here.
This PHY driver is used by the RTL8127ATF support in r8169.
RTL8127ATF reports the same PHY ID as the TP version. Therefore use a dummy
PHY ID.  This PHY driver is used by the RTL8127ATF support in r8169.

Signed-off-by: default avatarHeiner Kallweit <hkallweit1@gmail.com>
Link: https://patch.msgid.link/e3d55162-210a-4fab-9abf-99c6954eee10@gmail.com


Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parent ae4744e1

MAINTAINERS

+1 −0
Original line number Diff line number Diff line
@@ -9417,6 +9417,7 @@ F: include/linux/phy_link_topology.h 
F:	include/linux/phylib_stubs.h

F:	include/linux/platform_data/mdio-bcm-unimac.h

F:	include/linux/platform_data/mdio-gpio.h

F:	include/net/phy/

F:	include/trace/events/mdio.h

F:	include/uapi/linux/mdio.h

F:	include/uapi/linux/mii.h

drivers/net/phy/realtek/realtek_main.c

+54 −0
Original line number Diff line number Diff line
@@ -17,6 +17,7 @@ 
#include <linux/delay.h>

#include <linux/clk.h>

#include <linux/string_choices.h>

#include <net/phy/realtek_phy.h>



#include "../phylib.h"

#include "realtek.h"
@@ -2100,6 +2101,45 @@ static irqreturn_t rtl8221b_handle_interrupt(struct phy_device *phydev) 
	return IRQ_HANDLED;

}



static int rtlgen_sfp_get_features(struct phy_device *phydev)

{

	linkmode_set_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT,

			 phydev->supported);



	/* set default mode */

	phydev->speed = SPEED_10000;

	phydev->duplex = DUPLEX_FULL;



	phydev->port = PORT_FIBRE;



	return 0;

}



static int rtlgen_sfp_read_status(struct phy_device *phydev)

{

	int val, err;



	err = genphy_update_link(phydev);

	if (err)

		return err;



	if (!phydev->link)

		return 0;



	val = rtlgen_read_vend2(phydev, RTL_VND2_PHYSR);

	if (val < 0)

		return val;



	rtlgen_decode_physr(phydev, val);



	return 0;

}



static int rtlgen_sfp_config_aneg(struct phy_device *phydev)

{

	return 0;

}



static struct phy_driver realtek_drvs[] = {

	{

		PHY_ID_MATCH_EXACT(0x00008201),
@@ -2361,6 +2401,20 @@ static struct phy_driver realtek_drvs[] = { 
		.write_page	= rtl821x_write_page,

		.read_mmd	= rtl822x_read_mmd,

		.write_mmd	= rtl822x_write_mmd,

	}, {

		PHY_ID_MATCH_EXACT(PHY_ID_RTL_DUMMY_SFP),

		.name		= "Realtek SFP PHY Mode",

		.flags		= PHY_IS_INTERNAL,

		.probe		= rtl822x_probe,

		.get_features	= rtlgen_sfp_get_features,

		.config_aneg	= rtlgen_sfp_config_aneg,

		.read_status	= rtlgen_sfp_read_status,

		.suspend	= genphy_suspend,

		.resume		= rtlgen_resume,

		.read_page	= rtl821x_read_page,

		.write_page	= rtl821x_write_page,

		.read_mmd	= rtl822x_read_mmd,

		.write_mmd	= rtl822x_write_mmd,

	}, {

		PHY_ID_MATCH_EXACT(0x001ccad0),

		.name		= "RTL8224 2.5Gbps PHY",

include/net/phy/realtek_phy.h

0 → 100644
+7 −0
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/* SPDX-License-Identifier: GPL-2.0 */

#ifndef _REALTEK_PHY_H

#define _REALTEK_PHY_H



#define	PHY_ID_RTL_DUMMY_SFP	0x001ccbff



#endif /* _REALTEK_PHY_H */