Commit c4c50d8d authored by Bjorn Helgaas's avatar Bjorn Helgaas
Browse files

Merge branch 'pci/controller/tegra' 

- Correct the devm_kcalloc() argument order (Alok Tiwari)

- When asserting PERST#, disable the controller instead of mistakenly
  disabling the PLL twice (Nagarjuna Kristam)

- Convert struct tegra_msi mask_lock to raw spinlock to avoid a lock
  nesting error (Marek Vasut)

- Rename 'root_bus' to 'root_port_bus' for clarity (Manivannan Sadhasivam)

* pci/controller/tegra:
  PCI: tegra194: Rename 'root_bus' to 'root_port_bus' in tegra_pcie_downstream_dev_to_D0()
  PCI: tegra: Convert struct tegra_msi mask_lock into raw spinlock
  PCI: tegra194: Fix duplicate PLL disable in pex_ep_event_pex_rst_assert()
  PCI: tegra: Fix devm_kcalloc() argument order for port->phys allocation
parents 30eccd3b e1bd9284

drivers/pci/controller/dwc/pcie-tegra194.c

+8 −8
Original line number Diff line number Diff line
@@ -1284,7 +1284,7 @@ static int tegra_pcie_bpmp_set_pll_state(struct tegra_pcie_dw *pcie, 
static void tegra_pcie_downstream_dev_to_D0(struct tegra_pcie_dw *pcie)

{

	struct dw_pcie_rp *pp = &pcie->pci.pp;

	struct pci_bus *child, *root_bus = NULL;

	struct pci_bus *child, *root_port_bus = NULL;

	struct pci_dev *pdev;



	/*
@@ -1297,19 +1297,19 @@ static void tegra_pcie_downstream_dev_to_D0(struct tegra_pcie_dw *pcie) 
	 */



	list_for_each_entry(child, &pp->bridge->bus->children, node) {

		/* Bring downstream devices to D0 if they are not already in */

		if (child->parent == pp->bridge->bus) {

			root_bus = child;

			root_port_bus = child;

			break;

		}

	}



	if (!root_bus) {

		dev_err(pcie->dev, "Failed to find downstream devices\n");

	if (!root_port_bus) {

		dev_err(pcie->dev, "Failed to find downstream bus of Root Port\n");

		return;

	}



	list_for_each_entry(pdev, &root_bus->devices, bus_list) {

	/* Bring downstream devices to D0 if they are not already in */

	list_for_each_entry(pdev, &root_port_bus->devices, bus_list) {

		if (PCI_SLOT(pdev->devfn) == 0) {

			if (pci_set_power_state(pdev, PCI_D0))

				dev_err(pcie->dev,
@@ -1736,9 +1736,9 @@ static void pex_ep_event_pex_rst_assert(struct tegra_pcie_dw *pcie) 
				ret);

	}



	ret = tegra_pcie_bpmp_set_pll_state(pcie, false);

	ret = tegra_pcie_bpmp_set_ctrl_state(pcie, false);

	if (ret)

		dev_err(pcie->dev, "Failed to turn off UPHY: %d\n", ret);

		dev_err(pcie->dev, "Failed to disable controller: %d\n", ret);



	pcie->ep_state = EP_STATE_DISABLED;

	dev_dbg(pcie->dev, "Uninitialization of endpoint is completed\n");

drivers/pci/controller/pci-tegra.c

+14 −15
Original line number Diff line number Diff line
@@ -14,6 +14,7 @@ 
 */



#include <linux/clk.h>

#include <linux/cleanup.h>

#include <linux/debugfs.h>

#include <linux/delay.h>

#include <linux/export.h>
@@ -270,7 +271,7 @@ struct tegra_msi { 
	DECLARE_BITMAP(used, INT_PCI_MSI_NR);

	struct irq_domain *domain;

	struct mutex map_lock;

	spinlock_t mask_lock;

	raw_spinlock_t mask_lock;

	void *virt;

	dma_addr_t phys;

	int irq;
@@ -1344,7 +1345,7 @@ static int tegra_pcie_port_get_phys(struct tegra_pcie_port *port) 
	unsigned int i;

	int err;



	port->phys = devm_kcalloc(dev, sizeof(phy), port->lanes, GFP_KERNEL);

	port->phys = devm_kcalloc(dev, port->lanes, sizeof(phy), GFP_KERNEL);

	if (!port->phys)

		return -ENOMEM;
@@ -1581,14 +1582,13 @@ static void tegra_msi_irq_mask(struct irq_data *d) 
	struct tegra_msi *msi = irq_data_get_irq_chip_data(d);

	struct tegra_pcie *pcie = msi_to_pcie(msi);

	unsigned int index = d->hwirq / 32;

	unsigned long flags;

	u32 value;



	spin_lock_irqsave(&msi->mask_lock, flags);

	scoped_guard(raw_spinlock_irqsave, &msi->mask_lock) {

		value = afi_readl(pcie, AFI_MSI_EN_VEC(index));

		value &= ~BIT(d->hwirq % 32);

		afi_writel(pcie, value, AFI_MSI_EN_VEC(index));

	spin_unlock_irqrestore(&msi->mask_lock, flags);

	}

}



static void tegra_msi_irq_unmask(struct irq_data *d)
@@ -1596,14 +1596,13 @@ static void tegra_msi_irq_unmask(struct irq_data *d) 
	struct tegra_msi *msi = irq_data_get_irq_chip_data(d);

	struct tegra_pcie *pcie = msi_to_pcie(msi);

	unsigned int index = d->hwirq / 32;

	unsigned long flags;

	u32 value;



	spin_lock_irqsave(&msi->mask_lock, flags);

	scoped_guard(raw_spinlock_irqsave, &msi->mask_lock) {

		value = afi_readl(pcie, AFI_MSI_EN_VEC(index));

		value |= BIT(d->hwirq % 32);

		afi_writel(pcie, value, AFI_MSI_EN_VEC(index));

	spin_unlock_irqrestore(&msi->mask_lock, flags);

	}

}



static void tegra_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
@@ -1711,7 +1710,7 @@ static int tegra_pcie_msi_setup(struct tegra_pcie *pcie) 
	int err;



	mutex_init(&msi->map_lock);

	spin_lock_init(&msi->mask_lock);

	raw_spin_lock_init(&msi->mask_lock);



	if (IS_ENABLED(CONFIG_PCI_MSI)) {

		err = tegra_allocate_domains(msi);