Commit d97ab9e5 authored by Bjorn Helgaas's avatar Bjorn Helgaas
Browse files

Merge branch 'pci/controller/speed' 

- Use PCIE_SPEED2MBS_ENC() macro in qcom host and endpoint to encode link
  speed instead of hard-coding the link speed in MBps (Manivannan
  Sadhasivam)

- Use Mbps_to_icc() (not MBps_to_icc()) in tegra194 instead of explicitly
  doing the bytes-to-bits conversion (Manivannan Sadhasivam)

* pci/controller/speed:
  PCI: tegra194: Use Mbps_to_icc() macro for setting icc speed
  PCI: qcom-ep: Use PCIE_SPEED2MBS_ENC() macro for encoding link speed
  PCI: qcom: Use PCIE_SPEED2MBS_ENC() macro for encoding link speed
parents db20113d 85e9eb3e

drivers/pci/controller/dwc/pcie-qcom-ep.c

+6 −25
Original line number Diff line number Diff line
@@ -23,6 +23,7 @@ 
#include <linux/reset.h>

#include <linux/module.h>



#include "../../pci.h"

#include "pcie-designware.h"



/* PARF registers */
@@ -136,10 +137,8 @@ 
#define CORE_RESET_TIME_US_MAX			1005

#define WAKE_DELAY_US				2000 /* 2 ms */



#define PCIE_GEN1_BW_MBPS			250

#define PCIE_GEN2_BW_MBPS			500

#define PCIE_GEN3_BW_MBPS			985

#define PCIE_GEN4_BW_MBPS			1969

#define QCOM_PCIE_LINK_SPEED_TO_BW(speed) \

		Mbps_to_icc(PCIE_SPEED2MBS_ENC(pcie_link_speed[speed]))



#define to_pcie_ep(x)				dev_get_drvdata((x)->dev)
@@ -282,7 +281,7 @@ static void qcom_pcie_dw_write_dbi2(struct dw_pcie *pci, void __iomem *base, 
static void qcom_pcie_ep_icc_update(struct qcom_pcie_ep *pcie_ep)

{

	struct dw_pcie *pci = &pcie_ep->pci;

	u32 offset, status, bw;

	u32 offset, status;

	int speed, width;

	int ret;
@@ -295,25 +294,7 @@ static void qcom_pcie_ep_icc_update(struct qcom_pcie_ep *pcie_ep) 
	speed = FIELD_GET(PCI_EXP_LNKSTA_CLS, status);

	width = FIELD_GET(PCI_EXP_LNKSTA_NLW, status);



	switch (speed) {

	case 1:

		bw = MBps_to_icc(PCIE_GEN1_BW_MBPS);

		break;

	case 2:

		bw = MBps_to_icc(PCIE_GEN2_BW_MBPS);

		break;

	case 3:

		bw = MBps_to_icc(PCIE_GEN3_BW_MBPS);

		break;

	default:

		dev_warn(pci->dev, "using default GEN4 bandwidth\n");

		fallthrough;

	case 4:

		bw = MBps_to_icc(PCIE_GEN4_BW_MBPS);

		break;

	}



	ret = icc_set_bw(pcie_ep->icc_mem, 0, width * bw);

	ret = icc_set_bw(pcie_ep->icc_mem, 0, width * QCOM_PCIE_LINK_SPEED_TO_BW(speed));

	if (ret)

		dev_err(pci->dev, "failed to set interconnect bandwidth: %d\n",

			ret);
@@ -351,7 +332,7 @@ static int qcom_pcie_enable_resources(struct qcom_pcie_ep *pcie_ep) 
	 * Set an initial peak bandwidth corresponding to single-lane Gen 1

	 * for the pcie-mem path.

	 */

	ret = icc_set_bw(pcie_ep->icc_mem, 0, MBps_to_icc(PCIE_GEN1_BW_MBPS));

	ret = icc_set_bw(pcie_ep->icc_mem, 0, QCOM_PCIE_LINK_SPEED_TO_BW(1));

	if (ret) {

		dev_err(pci->dev, "failed to set interconnect bandwidth: %d\n",

			ret);

drivers/pci/controller/dwc/pcie-qcom.c

+6 −18
Original line number Diff line number Diff line
@@ -148,6 +148,9 @@ 


#define QCOM_PCIE_CRC8_POLYNOMIAL		(BIT(2) | BIT(1) | BIT(0))



#define QCOM_PCIE_LINK_SPEED_TO_BW(speed) \

		Mbps_to_icc(PCIE_SPEED2MBS_ENC(pcie_link_speed[speed]))



#define QCOM_PCIE_1_0_0_MAX_CLOCKS		4

struct qcom_pcie_resources_1_0_0 {

	struct clk_bulk_data clks[QCOM_PCIE_1_0_0_MAX_CLOCKS];
@@ -1375,7 +1378,7 @@ static int qcom_pcie_icc_init(struct qcom_pcie *pcie) 
	 * Set an initial peak bandwidth corresponding to single-lane Gen 1

	 * for the pcie-mem path.

	 */

	ret = icc_set_bw(pcie->icc_mem, 0, MBps_to_icc(250));

	ret = icc_set_bw(pcie->icc_mem, 0, QCOM_PCIE_LINK_SPEED_TO_BW(1));

	if (ret) {

		dev_err(pci->dev, "failed to set interconnect bandwidth: %d\n",

			ret);
@@ -1388,7 +1391,7 @@ static int qcom_pcie_icc_init(struct qcom_pcie *pcie) 
static void qcom_pcie_icc_update(struct qcom_pcie *pcie)

{

	struct dw_pcie *pci = pcie->pci;

	u32 offset, status, bw;

	u32 offset, status;

	int speed, width;

	int ret;
@@ -1405,22 +1408,7 @@ static void qcom_pcie_icc_update(struct qcom_pcie *pcie) 
	speed = FIELD_GET(PCI_EXP_LNKSTA_CLS, status);

	width = FIELD_GET(PCI_EXP_LNKSTA_NLW, status);



	switch (speed) {

	case 1:

		bw = MBps_to_icc(250);

		break;

	case 2:

		bw = MBps_to_icc(500);

		break;

	default:

		WARN_ON_ONCE(1);

		fallthrough;

	case 3:

		bw = MBps_to_icc(985);

		break;

	}



	ret = icc_set_bw(pcie->icc_mem, 0, width * bw);

	ret = icc_set_bw(pcie->icc_mem, 0, width * QCOM_PCIE_LINK_SPEED_TO_BW(speed));

	if (ret) {

		dev_err(pci->dev, "failed to set interconnect bandwidth: %d\n",

			ret);

drivers/pci/controller/dwc/pcie-tegra194.c

+2 −2
Original line number Diff line number Diff line
@@ -321,9 +321,9 @@ static void tegra_pcie_icc_set(struct tegra_pcie_dw *pcie) 
	speed = FIELD_GET(PCI_EXP_LNKSTA_CLS, val);

	width = FIELD_GET(PCI_EXP_LNKSTA_NLW, val);



	val = width * (PCIE_SPEED2MBS_ENC(pcie_link_speed[speed]) / BITS_PER_BYTE);

	val = width * PCIE_SPEED2MBS_ENC(pcie_link_speed[speed]);



	if (icc_set_bw(pcie->icc_path, MBps_to_icc(val), 0))

	if (icc_set_bw(pcie->icc_path, Mbps_to_icc(val), 0))

		dev_err(pcie->dev, "can't set bw[%u]\n", val);



	if (speed >= ARRAY_SIZE(pcie_gen_freq))