Commit da4f3b72 authored by Jakub Kicinski's avatar Jakub Kicinski
Browse files

Merge tag 'linux-can-next-for-6.12-20240830' of... 

Merge tag 'linux-can-next-for-6.12-20240830' of git://git.kernel.org/pub/scm/linux/kernel/git/mkl/linux-can-next

Marc Kleine-Budde says:

====================
pull-request: can-next 2024-08-30

The first patch is by Duy Nguyen and document the R-Car V4M support in
the rcar-canfd DT bindings.

Frank Li's patch converts the microchip,mcp251x.txt DT bindings
documentation to yaml.

A patch by Zhang Changzhong update a comment in the j1939 CAN
networking stack.

Stefan Mätje's patch updates the CAN configuration netlink code, so
that the bit timing calculation doesn't work on stale
can_priv::ctrlmode data.

Martin Jocic contributes a patch for the kvaser_pciefd driver to
convert some ifdefs into if (IS_ENABLED()).

The last patch is by Yan Zhen and simplifies the probe() function of
the kvaser USB driver by using dev_err_probe().

* tag 'linux-can-next-for-6.12-20240830' of git://git.kernel.org/pub/scm/linux/kernel/git/mkl/linux-can-next:
  can: kvaser_usb: Simplify with dev_err_probe()
  can: kvaser_pciefd: Use IS_ENABLED() instead of #ifdef
  can: netlink: avoid call to do_set_data_bittiming callback with stale can_priv::ctrlmode
  can: j1939: use correct function name in comment
  dt-bindings: can: convert microchip,mcp251x.txt to yaml
  dt-bindings: can: renesas,rcar-canfd: Document R-Car V4M support
====================

Link: https://patch.msgid.link/20240830214406.1605786-1-mkl@pengutronix.de


Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parents 69cb8998 0315c0b5

Documentation/devicetree/bindings/net/can/microchip,mcp2510.yaml

0 → 100644
+70 −0
Original line number Diff line number Diff line 
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/can/microchip,mcp2510.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Microchip MCP251X stand-alone CAN controller



maintainers:

  - Marc Kleine-Budde <mkl@pengutronix.de>



properties:

  compatible:

    enum:

      - microchip,mcp2510

      - microchip,mcp2515

      - microchip,mcp25625



  reg:

    maxItems: 1



  clocks:

    maxItems: 1



  interrupts:

    maxItems: 1



  vdd-supply:

    description: Regulator that powers the CAN controller.



  xceiver-supply:

    description: Regulator that powers the CAN transceiver.



  gpio-controller: true



  "#gpio-cells":

    const: 2



required:

  - compatible

  - reg

  - clocks

  - interrupts



allOf:

  - $ref: /schemas/spi/spi-peripheral-props.yaml#



unevaluatedProperties: false



examples:

  - |

    #include <dt-bindings/interrupt-controller/irq.h>



    spi {

        #address-cells = <1>;

        #size-cells = <0>;



        can@1 {

             compatible = "microchip,mcp2515";

             reg = <1>;

             clocks = <&clk24m>;

             interrupt-parent = <&gpio4>;

             interrupts = <13 IRQ_TYPE_LEVEL_LOW>;

             vdd-supply = <&reg5v0>;

             xceiver-supply = <&reg5v0>;

             gpio-controller;

             #gpio-cells = <2>;

        };

    };

Documentation/devicetree/bindings/net/can/microchip,mcp251x.txt

deleted100644 → 0
+0 −30
Original line number Diff line number Diff line 
* Microchip MCP251X stand-alone CAN controller device tree bindings



Required properties:

 - compatible: Should be one of the following:

   - "microchip,mcp2510" for MCP2510.

   - "microchip,mcp2515" for MCP2515.

   - "microchip,mcp25625" for MCP25625.

 - reg: SPI chip select.

 - clocks: The clock feeding the CAN controller.

 - interrupts: Should contain IRQ line for the CAN controller.



Optional properties:

 - vdd-supply: Regulator that powers the CAN controller.

 - xceiver-supply: Regulator that powers the CAN transceiver.

 - gpio-controller: Indicates this device is a GPIO controller.

 - #gpio-cells: Should be two. The first cell is the pin number and

                the second cell is used to specify the gpio polarity.



Example:

	can0: can@1 {

		compatible = "microchip,mcp2515";

		reg = <1>;

		clocks = <&clk24m>;

		interrupt-parent = <&gpio4>;

		interrupts = <13 IRQ_TYPE_LEVEL_LOW>;

		vdd-supply = <&reg5v0>;

		xceiver-supply = <&reg5v0>;

		gpio-controller;

		#gpio-cells = <2>;

	};

Documentation/devicetree/bindings/net/can/renesas,rcar-canfd.yaml

+16 −6
Original line number Diff line number Diff line
@@ -32,6 +32,7 @@ properties: 
          - enum:

              - renesas,r8a779a0-canfd     # R-Car V3U

              - renesas,r8a779g0-canfd     # R-Car V4H

              - renesas,r8a779h0-canfd     # R-Car V4M

          - const: renesas,rcar-gen4-canfd # R-Car Gen4



      - items:
@@ -163,6 +164,15 @@ allOf: 
          maxItems: 1



  - if:

      properties:

        compatible:

          contains:

            const: renesas,r8a779h0-canfd

    then:

      patternProperties:

        "^channel[5-7]$": false

    else:

      if:

        not:

          properties:

            compatible:

drivers/net/can/dev/netlink.c

+51 −51
Original line number Diff line number Diff line
@@ -65,15 +65,6 @@ static int can_validate(struct nlattr *tb[], struct nlattr *data[], 
	if (!data)

		return 0;



	if (data[IFLA_CAN_BITTIMING]) {

		struct can_bittiming bt;



		memcpy(&bt, nla_data(data[IFLA_CAN_BITTIMING]), sizeof(bt));

		err = can_validate_bittiming(&bt, extack);

		if (err)

			return err;

	}



	if (data[IFLA_CAN_CTRLMODE]) {

		struct can_ctrlmode *cm = nla_data(data[IFLA_CAN_CTRLMODE]);

		u32 tdc_flags = cm->flags & CAN_CTRLMODE_TDC_MASK;
@@ -114,6 +105,15 @@ static int can_validate(struct nlattr *tb[], struct nlattr *data[], 
		}

	}



	if (data[IFLA_CAN_BITTIMING]) {

		struct can_bittiming bt;



		memcpy(&bt, nla_data(data[IFLA_CAN_BITTIMING]), sizeof(bt));

		err = can_validate_bittiming(&bt, extack);

		if (err)

			return err;

	}



	if (is_can_fd) {

		if (!data[IFLA_CAN_BITTIMING] || !data[IFLA_CAN_DATA_BITTIMING])

			return -EOPNOTSUPP;
@@ -195,48 +195,6 @@ static int can_changelink(struct net_device *dev, struct nlattr *tb[], 
	/* We need synchronization with dev->stop() */

	ASSERT_RTNL();



	if (data[IFLA_CAN_BITTIMING]) {

		struct can_bittiming bt;



		/* Do not allow changing bittiming while running */

		if (dev->flags & IFF_UP)

			return -EBUSY;



		/* Calculate bittiming parameters based on

		 * bittiming_const if set, otherwise pass bitrate

		 * directly via do_set_bitrate(). Bail out if neither

		 * is given.

		 */

		if (!priv->bittiming_const && !priv->do_set_bittiming &&

		    !priv->bitrate_const)

			return -EOPNOTSUPP;



		memcpy(&bt, nla_data(data[IFLA_CAN_BITTIMING]), sizeof(bt));

		err = can_get_bittiming(dev, &bt,

					priv->bittiming_const,

					priv->bitrate_const,

					priv->bitrate_const_cnt,

					extack);

		if (err)

			return err;



		if (priv->bitrate_max && bt.bitrate > priv->bitrate_max) {

			NL_SET_ERR_MSG_FMT(extack,

					   "arbitration bitrate %u bps surpasses transceiver capabilities of %u bps",

					   bt.bitrate, priv->bitrate_max);

			return -EINVAL;

		}



		memcpy(&priv->bittiming, &bt, sizeof(bt));



		if (priv->do_set_bittiming) {

			/* Finally, set the bit-timing registers */

			err = priv->do_set_bittiming(dev);

			if (err)

				return err;

		}

	}



	if (data[IFLA_CAN_CTRLMODE]) {

		struct can_ctrlmode *cm;

		u32 ctrlstatic;
@@ -284,6 +242,48 @@ static int can_changelink(struct net_device *dev, struct nlattr *tb[], 
			priv->ctrlmode &= cm->flags | ~CAN_CTRLMODE_TDC_MASK;

	}



	if (data[IFLA_CAN_BITTIMING]) {

		struct can_bittiming bt;



		/* Do not allow changing bittiming while running */

		if (dev->flags & IFF_UP)

			return -EBUSY;



		/* Calculate bittiming parameters based on

		 * bittiming_const if set, otherwise pass bitrate

		 * directly via do_set_bitrate(). Bail out if neither

		 * is given.

		 */

		if (!priv->bittiming_const && !priv->do_set_bittiming &&

		    !priv->bitrate_const)

			return -EOPNOTSUPP;



		memcpy(&bt, nla_data(data[IFLA_CAN_BITTIMING]), sizeof(bt));

		err = can_get_bittiming(dev, &bt,

					priv->bittiming_const,

					priv->bitrate_const,

					priv->bitrate_const_cnt,

					extack);

		if (err)

			return err;



		if (priv->bitrate_max && bt.bitrate > priv->bitrate_max) {

			NL_SET_ERR_MSG_FMT(extack,

					   "arbitration bitrate %u bps surpasses transceiver capabilities of %u bps",

					   bt.bitrate, priv->bitrate_max);

			return -EINVAL;

		}



		memcpy(&priv->bittiming, &bt, sizeof(bt));



		if (priv->do_set_bittiming) {

			/* Finally, set the bit-timing registers */

			err = priv->do_set_bittiming(dev);

			if (err)

				return err;

		}

	}



	if (data[IFLA_CAN_RESTART_MS]) {

		/* Do not allow changing restart delay while running */

		if (dev->flags & IFF_UP)

drivers/net/can/kvaser_pciefd.c

+13 −13
Original line number Diff line number Diff line
@@ -1053,13 +1053,13 @@ static void kvaser_pciefd_write_dma_map_altera(struct kvaser_pciefd *pcie, 
	void __iomem *serdes_base;

	u32 word1, word2;



#ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT

	word1 = addr | KVASER_PCIEFD_ALTERA_DMA_64BIT;

	word2 = addr >> 32;

#else

	if (IS_ENABLED(CONFIG_ARCH_DMA_ADDR_T_64BIT)) {

		word1 = lower_32_bits(addr) | KVASER_PCIEFD_ALTERA_DMA_64BIT;

		word2 = upper_32_bits(addr);

	} else {

		word1 = addr;

		word2 = 0;

#endif

	}

	serdes_base = KVASER_PCIEFD_SERDES_ADDR(pcie) + 0x8 * index;

	iowrite32(word1, serdes_base);

	iowrite32(word2, serdes_base + 0x4);
@@ -1072,9 +1072,9 @@ static void kvaser_pciefd_write_dma_map_sf2(struct kvaser_pciefd *pcie, 
	u32 lsb = addr & KVASER_PCIEFD_SF2_DMA_LSB_MASK;

	u32 msb = 0x0;



#ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT

	msb = addr >> 32;

#endif

	if (IS_ENABLED(CONFIG_ARCH_DMA_ADDR_T_64BIT))

		msb = upper_32_bits(addr);



	serdes_base = KVASER_PCIEFD_SERDES_ADDR(pcie) + 0x10 * index;

	iowrite32(lsb, serdes_base);

	iowrite32(msb, serdes_base + 0x4);
@@ -1087,9 +1087,9 @@ static void kvaser_pciefd_write_dma_map_xilinx(struct kvaser_pciefd *pcie, 
	u32 lsb = addr & KVASER_PCIEFD_XILINX_DMA_LSB_MASK;

	u32 msb = 0x0;



#ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT

	msb = addr >> 32;

#endif

	if (IS_ENABLED(CONFIG_ARCH_DMA_ADDR_T_64BIT))

		msb = upper_32_bits(addr);



	serdes_base = KVASER_PCIEFD_SERDES_ADDR(pcie) + 0x8 * index;

	iowrite32(msb, serdes_base);

	iowrite32(lsb, serdes_base + 0x4);