Commit e96397db authored by Anand Moon's avatar Anand Moon Committed by Vinod Koul
Browse files

phy: rockchip-pcie: Use devm_clk_get_enabled() helper 



Use devm_clk_get_enabled() instead of devm_clk_get() to make the code
cleaner and avoid calling clk_disable_unprepare(), as this is exactly
what this function does. Use the dev_err_probe() helper to simplify
error handling during probe.

Refactor the mutex handling in the rockchip_pcie_phy_init() function
to improve code readability and maintainability. The goto statement has
been removed, and the mutex_unlock call is now directly within the
conditional block.

Return the result of reset_control_assert() function, with 0 indicating
success and an error code indicating failure

Signed-off-by: default avatarAnand Moon <linux.amoon@gmail.com>
Link: https://lore.kernel.org/r/20241012071919.3726-3-linux.amoon@gmail.com


Signed-off-by: default avatarVinod Koul <vkoul@kernel.org>
parent 84de9180

drivers/phy/rockchip/phy-rockchip-pcie.c

+10 −24
Original line number Diff line number Diff line
@@ -274,30 +274,19 @@ static int rockchip_pcie_phy_init(struct phy *phy) 


	mutex_lock(&rk_phy->pcie_mutex);



	if (rk_phy->init_cnt++)

		goto err_out;



	err = clk_prepare_enable(rk_phy->clk_pciephy_ref);

	if (err) {

		dev_err(&phy->dev, "Fail to enable pcie ref clock.\n");

		goto err_refclk;

	if (rk_phy->init_cnt++) {

		mutex_unlock(&rk_phy->pcie_mutex);

		return 0;

	}



	err = reset_control_assert(rk_phy->phy_rst);

	if (err) {

		dev_err(&phy->dev, "assert phy_rst err %d\n", err);

		goto err_reset;

	}



err_out:

		rk_phy->init_cnt--;

		mutex_unlock(&rk_phy->pcie_mutex);

	return 0;



err_reset:

		return err;

	}



	clk_disable_unprepare(rk_phy->clk_pciephy_ref);

err_refclk:

	rk_phy->init_cnt--;

	mutex_unlock(&rk_phy->pcie_mutex);

	return err;

}
@@ -312,8 +301,6 @@ static int rockchip_pcie_phy_exit(struct phy *phy) 
	if (--rk_phy->init_cnt)

		goto err_init_cnt;



	clk_disable_unprepare(rk_phy->clk_pciephy_ref);



err_init_cnt:

	mutex_unlock(&rk_phy->pcie_mutex);

	return 0;
@@ -375,11 +362,10 @@ static int rockchip_pcie_phy_probe(struct platform_device *pdev) 
		return dev_err_probe(&pdev->dev, PTR_ERR(rk_phy->phy_rst),

				     "missing phy property for reset controller\n");



	rk_phy->clk_pciephy_ref = devm_clk_get(dev, "refclk");

	if (IS_ERR(rk_phy->clk_pciephy_ref)) {

		dev_err(dev, "refclk not found.\n");

		return PTR_ERR(rk_phy->clk_pciephy_ref);

	}

	rk_phy->clk_pciephy_ref = devm_clk_get_enabled(dev, "refclk");

	if (IS_ERR(rk_phy->clk_pciephy_ref))

		return dev_err_probe(&pdev->dev, PTR_ERR(rk_phy->clk_pciephy_ref),

				     "failed to get phyclk\n");



	/* parse #phy-cells to see if it's legacy PHY model */

	if (of_property_read_u32(dev->of_node, "#phy-cells", &phy_num))