Commit ea172f61 authored by Konrad Dybcio's avatar Konrad Dybcio Committed by Bjorn Andersson
Browse files

arm64: dts: qcom: qcs615: Fix up UFS clocks



The clocks are out of order with the bindings' expectations.

Reorder them to resolve the errors.

Fixes: a6a9d10e ("arm64: dts: qcom: qcs615: add UFS node")
Signed-off-by: default avatarKonrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: default avatarDmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250327-topic-more_dt_bindings_fixes-v2-12-b763d958545f@oss.qualcomm.com


Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
parent f2754479
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+8 −8
Original line number Diff line number Diff line
@@ -1033,10 +1033,10 @@ ufs_mem_hc: ufshc@1d84000 {
				      "bus_aggr_clk",
				      "iface_clk",
				      "core_clk_unipro",
				      "core_clk_ice",
				      "ref_clk",
				      "tx_lane0_sync_clk",
				      "rx_lane0_sync_clk";
				      "rx_lane0_sync_clk",
				      "ice_core_clk";

			resets = <&gcc GCC_UFS_PHY_BCR>;
			reset-names = "rst";
@@ -1071,10 +1071,10 @@ opp-50000000 {
						 /bits/ 64 <0>,
						 /bits/ 64 <0>,
						 /bits/ 64 <37500000>,
						 /bits/ 64 <75000000>,
						 /bits/ 64 <0>,
						 /bits/ 64 <0>,
						 /bits/ 64 <0>;
						 /bits/ 64 <0>,
						 /bits/ 64 <75000000>;
					required-opps = <&rpmhpd_opp_low_svs>;
				};

@@ -1083,10 +1083,10 @@ opp-100000000 {
						 /bits/ 64 <0>,
						 /bits/ 64 <0>,
						 /bits/ 64 <75000000>,
						 /bits/ 64 <150000000>,
						 /bits/ 64 <0>,
						 /bits/ 64 <0>,
						 /bits/ 64 <0>;
						 /bits/ 64 <0>,
						 /bits/ 64 <150000000>;
					required-opps = <&rpmhpd_opp_svs>;
				};

@@ -1095,10 +1095,10 @@ opp-200000000 {
						 /bits/ 64 <0>,
						 /bits/ 64 <0>,
						 /bits/ 64 <150000000>,
						 /bits/ 64 <300000000>,
						 /bits/ 64 <0>,
						 /bits/ 64 <0>,
						 /bits/ 64 <0>;
						 /bits/ 64 <0>,
						 /bits/ 64 <300000000>;
					required-opps = <&rpmhpd_opp_nom>;
				};
			};