Commit f9ccaf6d authored by Roy Chan's avatar Roy Chan Committed by Alex Deucher
Browse files

drm/amd/display: refactor the codes to centralize the stream/pipe checking logic 



Acked-by: default avatarAnson Jacob <Anson.Jacob@amd.com>
Signed-off-by: default avatarRoy Chan <roy.chan@amd.com>
Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 82367e7f

drivers/gpu/drm/amd/display/dc/core/dc.c

+41 −21
Original line number Diff line number Diff line
@@ -1481,6 +1481,22 @@ bool dc_validate_seamless_boot_timing(const struct dc *dc, 
	return true;

}



static inline bool should_update_pipe_for_stream(

		struct dc_state *context,

		struct pipe_ctx *pipe_ctx,

		struct dc_stream_state *stream)

{

	return (pipe_ctx->stream && pipe_ctx->stream == stream);

}



static inline bool should_update_pipe_for_plane(

		struct dc_state *context,

		struct pipe_ctx *pipe_ctx,

		struct dc_plane_state *plane_state)

{

	return (pipe_ctx->plane_state == plane_state);

}



void dc_enable_stereo(

	struct dc *dc,

	struct dc_state *context,
@@ -1491,12 +1507,15 @@ void dc_enable_stereo( 
	struct pipe_ctx *pipe;



	for (i = 0; i < MAX_PIPES; i++) {

		if (context != NULL)

		if (context != NULL) {

			pipe = &context->res_ctx.pipe_ctx[i];

		else

		} else {

			context = dc->current_state;

			pipe = &dc->current_state->res_ctx.pipe_ctx[i];

		}



		for (j = 0; pipe && j < stream_count; j++)  {

			if (streams[j] && streams[j] == pipe->stream &&

			if (should_update_pipe_for_stream(context, pipe, streams[j]) &&

				dc->hwss.setup_stereo)

				dc->hwss.setup_stereo(pipe, dc);

		}
@@ -2623,6 +2642,7 @@ static void commit_planes_for_stream(struct dc *dc, 
{

	int i, j;

	struct pipe_ctx *top_pipe_to_program = NULL;

	bool should_lock_all_pipes = (update_type != UPDATE_TYPE_FAST);



#if defined(CONFIG_DRM_AMD_DC_DCN)

	dc_z10_restore(dc);
@@ -2694,7 +2714,7 @@ static void commit_planes_for_stream(struct dc *dc, 
						top_pipe_to_program->stream_res.tg);

		}



	if ((update_type != UPDATE_TYPE_FAST) && dc->hwss.interdependent_update_lock)

	if (should_lock_all_pipes && dc->hwss.interdependent_update_lock)

		dc->hwss.interdependent_update_lock(dc, context, true);

	else

		/* Lock the top pipe while updating plane addrs, since freesync requires
@@ -2717,7 +2737,7 @@ static void commit_planes_for_stream(struct dc *dc, 
		if (dc->hwss.program_front_end_for_ctx)

			dc->hwss.program_front_end_for_ctx(dc, context);



		if ((update_type != UPDATE_TYPE_FAST) && dc->hwss.interdependent_update_lock)

		if (should_lock_all_pipes && dc->hwss.interdependent_update_lock)

			dc->hwss.interdependent_update_lock(dc, context, false);

		else

			dc->hwss.pipe_control_lock(dc, top_pipe_to_program, false);
@@ -2733,14 +2753,14 @@ static void commit_planes_for_stream(struct dc *dc, 
				struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[j];

				if (!pipe_ctx->plane_state)

					continue;

				if (pipe_ctx->plane_state != plane_state)

				if (should_update_pipe_for_plane(context, pipe_ctx, plane_state))

					continue;

				plane_state->triplebuffer_flips = false;

				pipe_ctx->plane_state->triplebuffer_flips = false;

				if (update_type == UPDATE_TYPE_FAST &&

					dc->hwss.program_triplebuffer != NULL &&

					!plane_state->flip_immediate && dc->debug.enable_tri_buf) {

					!pipe_ctx->plane_state->flip_immediate && dc->debug.enable_tri_buf) {

						/*triple buffer for VUpdate  only*/

						plane_state->triplebuffer_flips = true;

						pipe_ctx->plane_state->triplebuffer_flips = true;

				}

			}

			if (update_type == UPDATE_TYPE_FULL) {
@@ -2756,8 +2776,7 @@ static void commit_planes_for_stream(struct dc *dc, 


		if (!pipe_ctx->top_pipe &&

			!pipe_ctx->prev_odm_pipe &&

			pipe_ctx->stream &&

			pipe_ctx->stream == stream) {

			should_update_pipe_for_stream(context, pipe_ctx, stream)) {

			struct dc_stream_status *stream_status = NULL;



			if (!pipe_ctx->plane_state)
@@ -2810,15 +2829,15 @@ static void commit_planes_for_stream(struct dc *dc, 
				for (j = 0; j < dc->res_pool->pipe_count; j++) {

					struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[j];



					if (pipe_ctx->stream != stream)

					if (!should_update_pipe_for_stream(context, pipe_ctx, stream))

						continue;



					if (pipe_ctx->plane_state != plane_state)

					if (!should_update_pipe_for_plane(context, pipe_ctx, plane_state))

						continue;



					// GSL has to be used for flip immediate

					dc->hwss.set_flip_control_gsl(pipe_ctx,

							plane_state->flip_immediate);

							pipe_ctx->plane_state->flip_immediate);

				}

			}
@@ -2829,25 +2848,26 @@ static void commit_planes_for_stream(struct dc *dc, 
			for (j = 0; j < dc->res_pool->pipe_count; j++) {

				struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[j];



				if (pipe_ctx->stream != stream)

				if (!should_update_pipe_for_stream(context, pipe_ctx, stream))

					continue;



				if (pipe_ctx->plane_state != plane_state)

				if (!should_update_pipe_for_plane(context, pipe_ctx, plane_state))

					continue;



				/*program triple buffer after lock based on flip type*/

				if (dc->hwss.program_triplebuffer != NULL && dc->debug.enable_tri_buf) {

					/*only enable triplebuffer for  fast_update*/

					dc->hwss.program_triplebuffer(

						dc, pipe_ctx, plane_state->triplebuffer_flips);

						dc, pipe_ctx, pipe_ctx->plane_state->triplebuffer_flips);

				}

				if (srf_updates[i].flip_addr)

				if (pipe_ctx->plane_state->update_flags.bits.addr_update)

					dc->hwss.update_plane_addr(dc, pipe_ctx);

			}

		}



	}



	if ((update_type != UPDATE_TYPE_FAST) && dc->hwss.interdependent_update_lock)

	if (should_lock_all_pipes && dc->hwss.interdependent_update_lock)

		dc->hwss.interdependent_update_lock(dc, context, false);

	else

		dc->hwss.pipe_control_lock(dc, top_pipe_to_program, false);
@@ -2891,7 +2911,7 @@ static void commit_planes_for_stream(struct dc *dc, 
			continue;



		if (pipe_ctx->bottom_pipe || pipe_ctx->next_odm_pipe ||

				!pipe_ctx->stream || pipe_ctx->stream != stream ||

				!pipe_ctx->stream || !should_update_pipe_for_stream(context, pipe_ctx, stream) ||

				!pipe_ctx->plane_state->update_flags.bits.addr_update ||

				pipe_ctx->plane_state->skip_manual_trigger)

			continue;