Commit fce3fb7b authored by Michal Wajdeczko's avatar Michal Wajdeczko
Browse files

drm/xe/vf: Don't check CTC_MODE[0] if VF 



Starting from commit 18778b5f ("drm/xe: Eliminate usage of
TIMESTAMP_OVERRIDE") we access the CTC_MODE register only to warn
if it has undocumented value.  There is no point in doing that on
the VF driver.  While here, move this check to a helper function.

Signed-off-by: default avatarMichal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: default avatarMatt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250311114042.1954-2-michal.wajdeczko@intel.com
parent f990c11a

drivers/gpu/drm/xe/xe_gt_clock.c

+11 −4
Original line number Diff line number Diff line
@@ -40,11 +40,8 @@ static u32 get_crystal_clock_freq(u32 rpm_config_reg) 
	}

}



int xe_gt_clock_init(struct xe_gt *gt)

static void check_ctc_mode(struct xe_gt *gt)

{

	u32 c0 = xe_mmio_read32(&gt->mmio, RPM_CONFIG0);

	u32 freq = 0;



	/*

	 * CTC_MODE[0] = 1 is definitely not supported for Xe2 and later

	 * platforms.  In theory it could be a valid setting for pre-Xe2
@@ -57,7 +54,17 @@ int xe_gt_clock_init(struct xe_gt *gt) 
	 */

	if (xe_mmio_read32(&gt->mmio, CTC_MODE) & CTC_SOURCE_DIVIDE_LOGIC)

		xe_gt_warn(gt, "CTC_MODE[0] is set; this is unexpected and undocumented\n");

}



int xe_gt_clock_init(struct xe_gt *gt)

{

	u32 freq;

	u32 c0;



	if (!IS_SRIOV_VF(gt_to_xe(gt)))

		check_ctc_mode(gt);



	c0 = xe_mmio_read32(&gt->mmio, RPM_CONFIG0);

	freq = get_crystal_clock_freq(c0);



	/*