2018-04-30 Richard Biener <rguenther@suse.de>
* tree-cfg.c (verify_address): Remove base argument, add
flag whether to check TREE_ADDRESSABLE and do that.
(verify_expr): Remove.
(verify_types_in_gimple_reference): Add pieces from verify_expr.
(verify_gimple_assign_single): Likewise.
(verify_gimple_switch): Likewise.
(verify_expr_location_1): Dereference tp once. Add (disabled)
piece from verify_expr.
(verify_gimple_in_cfg): Do not call verify_expr on all ops.
From-SVN: r259765
Clear the instruction cache from `beg' to `end'. This makes an inline
system call to SYS_cacheflush.
gcc/
2017-03-28 Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/linux.h (CLEAR_INSN_CACHE): Define.
From-SVN: r259764
Allow signed 6-bit short immediates into st[d] instructions.
2017-10-19 Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/arc.c (arc_split_move): Allow signed 6-bit constants
as source of std instructions.
* config/arc/arc.md (movsi_insn): Update pattern predicate to
allow 6-bit constants as source for store instructions.
(movdi_insn): Update instruction pattern to allow 6-bit constants
as source for store instructions.
testsuite/
2017-10-19 Claudiu Zissulescu <claziss@synopsys.com>
* gcc.target/arc/store-merge-1.c: New test.
* gcc.target/arc/add_n-combine.c: Update test.
From-SVN: r259762
2018-04-30 Andrew Sadek <andrew.sadek.se@gmail.com>
gcc/ChangeLog:
* config/microblaze/microblaze.opt: add new option -mpic-data-text-rel.
* config/microblaze/microblaze-protos.h (microblaze_constant_address_p):
Add declaration.
* gcc/config/microblaze/microblaze.h (microblaze_constant_address_p):
CONSTANT_ADDRESS_P definition to microblaze_constant_address_p.
* config/microblaze/microblaze.c (TARGET_PIC_DATA_TEXT_REL):
New addressing mode for data-text relative position indepenedent code.
(microblaze_classify_unspec): add 'UNSPEC_TEXT' case ->
'ADDRESS_SYMBOLIC_TXT_REL'.
(microblaze_classify_address): Add handling for UNSPEC + CONST_INT.
(microblaze_legitimate_pic_operand): Exclude function calls from
pic operands in case of TARGET_PIC_DATA_TEXT_REL option.
(microblaze_legitimize_address): Generate 'UNSPEC_TEXT' for all possible
addresses cases.
(microblaze_address_insns): Add 'ADDRESS_SYMBOLIC_TXT_REL' case.
(print_operand): Add 'ADDRESS_SYMBOLIC_TXT_REL' case.
(print_operand_address): Add 'ADDRESS_SYMBOLIC_TXT_REL' case + handling
for 'address + offset'.
(microblaze_expand_prologue): Add new function prologue call for
'r20' assignation.
(microblaze_asm_generate_pic_addr_dif_vec): Override new target hook
'TARGET_ASM_GENERATE_PIC_ADDR_DIFF_VEC' to disable address diff vector
table in case of TARGET_PIC_DATA_TEXT_REL.
(expand_pic_symbol_ref): Add handling for 'UNSPEC_TEXT'.
* gcc/config/microblaze/microblaze.md (TARGET_PIC_DATA_TEXT_REL):
Add new macros 'UNSPEC_TEXT',
'UNSPEC_SET_TEXT' + add rule for setting r20 in function prologue
+ exclude function calls from 'UNSPEC_PLT' in case of data text
relative mode.
* doc/tm.texi.in (TARGET_ASM_GENERATE_PIC_ADDR_DIFF_VEC): Add
new target hook for generating address diff vector tables in case of
flag_pic.
* doc/tm.texi : Regenerate.
* stmt.c (TARGET_ASM_GENERATE_PIC_ADDR_DIFF_VEC): Append new condition
'targetm.asm_out.generate_pic_addr_diff_vec' to flag_pic in case
of addr diff vector generation.
* target.def (TARGET_ASM_GENERATE_PIC_ADDR_DIFF_VEC): Add
target hook definition.
* targhooks.h, gcc/targhooks.c (TARGET_ASM_GENERATE_PIC_ADDR_DIFF_VEC):
Add default function for generate_pic_addr_diff_vec -> flag_pic.
* doc/invoke.texi (Add new pic option): Add new microblaze pic
option for data text relative.
testsuite/ChangeLog:
* gcc.target/microblaze/others/data_var1.c: Include
PIC case of r20 base register.
* gcc.target/microblaze/others/data_var2.c: Ditto.
* gcc.target/microblaze/others/picdtr.c: Add new
test case for -mpic-is-data-text-relative.
* gcc.target/microblaze/others/sdata_var1.c: Add
* gcc.target/microblaze/others/sdata_var2.c: Ditto.
* gcc.target/microblaze/others/sdata_var3.c: Ditto.
* gcc.target/microblaze/others/sdata_var4.c: Ditto.
* gcc.target/microblaze/others/sdata_var5.c: Ditto.
* gcc.target/microblaze/others/sdata_var6.c: Ditto.
* gcc.target/microblaze/others/string_cst1_gpopt.c: Ditto.
* gcc.target/microblaze/others/string_cst2_gpopt.c: Ditto.
From-SVN: r259758
* lto-partition.c: Include sreal.h
(add_symbol_to_partition_1): Use size instead of self_size
for size estimate.
(account_reference_p): New.
(lto_balanced_map): Use 64bit arithmetics for size calculatoins; cleanup;
fix accounting errors in boundary size; add debug output; combine cost
as cost/size instead of cost/internal; reduce the partitioning error to
+- 1/8 of the parttion size.
From-SVN: r259749
2018-04-29 Julian Brown <julian@codesourcery.com>
Tom de Vries <tom@codesourcery.com>
PR testsuite/85527
* testsuite/libgomp.oacc-c-c++-common/atomic_capture-1.c: Allow
arbitrary order for iterations of atomic subtract check.
Co-Authored-By: Tom de Vries <tom@codesourcery.com>
From-SVN: r259748
GNU DebugFission didn't add table headers for the .debug_addr
tables, but DWARF5 does. The table header makes it possible
for a DWARF consumer to parse the address tables without having
to index all .debug_info CUs first.
We can keep using the .debug_addr section label as is, because the
DW_AT_[GNU_]addr_base attribute points at the actual address index,
which starts right after the table header. So the label is generated
at the correct location whether the header is added first or not.
Add DW_AT_addr_base instead of DW_AT_GNU_addr_base to the skeleton
CU DIE for DWARF5.
gcc/ChangeLog
* dwarf2out.c (dwarf2out_finish): Add .debug_addr table header for
dwarf_version >= 5.
(dwarf_AT): Handle DW_AT_addr_base.
(add_top_level_skeleton_die_attrs): Use dwarf_AT for DW_AT_addr_base.
From-SVN: r259743
2018-04-28 Richard Biener <rguenther@suse.de>
* tree-cfg.c (verify_gimple_phi): Take a gphi * argument.
(verify_gimple_in_cfg): Rename visited_stmts to visited_throwing_stmts
to reflect use. Only add interesting stmts.
From-SVN: r259738
2018-04-28 Tom de Vries <tom@codesourcery.com>
PR testsuite/85527
* testsuite/libgomp.oacc-fortran/atomic_capture-1.f90 (main): Store
atomic capture results obtained in parallel loop to an array, instead of
to a scalar.
From-SVN: r259733
PR ipa/85549
* ipa-cp.c (find_aggregate_values_for_callers_subset): Make sure
the jump function allows for passing through aggregate values.
* g++.dg/ipa/pr85549.C: New test.
From-SVN: r259730
PR c++/85553
* init.c (build_zero_init_1): For zero initialization of
NULLPTR_TYPE_P type use build_int_cst directly.
* g++.dg/cpp0x/Wzero-as-null-pointer-constant-3.C: Add dg-bogus
directive.
* g++.dg/cpp0x/constexpr-85553.C: New test.
From-SVN: r259728
gcc/cp/ChangeLog:
PR c++/85515
* name-lookup.c (consider_binding_level): Skip compiler-generated
variables.
* search.c (lookup_field_fuzzy_info::fuzzy_lookup_field): Flatten
nested if statements into a series of rejection tests. Reject
lambda-ignored entities as suggestions.
gcc/testsuite/ChangeLog:
PR c++/85515
* g++.dg/pr85515-1.C: New test.
* g++.dg/pr85515-2.C: New test.
From-SVN: r259720
* config/i386/i386.md (*movti_internal): Substitute Ye constraint
with Yd constraint. Set "preferred_for_speed" attribute from
TARGET_INTER_UNIT_MOVES_{FROM,TO}_VEC for alternatives
with Yd constraint.
(*movdi_internal): Ditto.
(movti_interunit splitters): Remove
TARGET_INTER_UNIT_MOVES_{FROM,TO}_VEC from insn condition.
(movdi_interunit splitters): Ditto.
* config/i386/constraints.md (Ye): Remove.
(Yd): Do not depend on TARGET_INTER_UNIT_MOVES_{FROM,TO}_VEC.
From-SVN: r259701
PR tree-optimization/85529
* tree-ssa-reassoc.c (optimize_range_tests_var_bound): Add FIRST_BB
argument. Don't call get_nonzero_bits if opcode is ERROR_MARK_NODE,
rhs2 def stmt's bb is dominated by first_bb and it isn't an obvious
zero extension or masking of the MSB bit.
(optimize_range_tests): Add FIRST_BB argument, pass it through
to optimize_range_tests_var_bound.
(maybe_optimize_range_tests, reassociate_bb): Adjust
optimize_range_tests callers.
* gcc.c-torture/execute/pr85529-1.c: New test.
* gcc.c-torture/execute/pr85529-2.c: New test.
* gcc.dg/pr85529.c: New test.
From-SVN: r259696
With the soft-float n64 ABI and the data-sym-pool.c test case code like
below is produced:
.file 1 "data-sym-pool.c"
.section .mdebug.abi64
.previous
.nan legacy
.module softfloat
.module oddspreg
.abicalls
.option pic0
.text
.align 2
.globl frob
.set mips16
.set nomicromips
.ent frob
.type frob, @function
frob:
.frame $17,16,$31 # vars= 0, regs= 1/0, args= 0, gp= 0
.mask 0x00020000,-8
.fmask 0x00000000,0
daddiu $sp,-16
sd $17,8($sp)
move $17,$sp
ld $2,.L3
move $sp,$17
ld $17,8($sp)
daddiu $sp,16
jr $31
.type __pool_frob_3, @object
__pool_frob_3:
.align 3
.L3:
.dword 305419896
.type __pend_frob_3, @function
__pend_frob_3:
.insn
.end frob
.size frob, .-frob
.ident "GCC: (GNU) 8.0.1 20180410 (experimental)"
(we have no support for hard-float n64 MIPS16 code generation), which
means that the test case will fail, as the regular expression pattern
expects `lw' and `.word' rather than `ld' and `.dword' respectively to
appear in assembly code generation. Correct the pattern in an obvious
way then making it accept both intructions and pseudo-ops.
gcc/testsuite/
* gcc.target/mips/data-sym-pool.c (dg-options): Match `ld' and
`.dword' in addition to `lw' and `.word'.
From-SVN: r259691
With GCC configurations using the SVR4 rather than the PLT dynamic
executable model and the o32 ABI with the data-sym-pool.c test case code
like below is produced:
.file 1 "data-sym-pool.c"
.section .mdebug.abi32
.previous
.nan legacy
.module fp=xx
.module nooddspreg
.abicalls
.text
.align 2
.globl frob
.set mips16
.set nomicromips
.ent frob
.type frob, @function
frob:
.frame $17,8,$31 # vars= 0, regs= 1/0, args= 0, gp= 0
.mask 0x00020000,-4
.fmask 0x00000000,0
save 8,$17
move $17,$sp
lw $2,$L4
move $sp,$17
restore 8,$17
jr $31
.type __pool_frob_3, @object
__pool_frob_3:
.align 2
$L3:
.word __gnu_local_gp
$L4:
.word 305419896
.type __pend_frob_3, @function
__pend_frob_3:
.insn
.end frob
.size frob, .-frob
.ident "GCC: (GNU) 8.0.1 20180410 (experimental)"
causing a failure due to the unexpected `__gnu_local_gp' entry in the
constant pool, even though there is nothing wrong with it as far as the
annotation being examined is concerned.
Given that the SVR4 vs PLT code model consideration is irrelevant for
this test case rather than rewriting the regular expression to match
this variant of code just enforce the PLT model by using the `-mplt'
option. It is safe to use this option unconditionally as it is silently
ignored with configurations that do not support this model, e.g. bare
metal ELF.
gcc/testsuite/
* gcc.target/mips/data-sym-pool.c (dg-options): Add `-mplt'.
From-SVN: r259690
David Malcolm