Unverified Commit 0df99689 authored by Tvrtko Ursulin's avatar Tvrtko Ursulin Committed by Rodrigo Vivi
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drm/xe/xelp: Fix Wa_18022495364 



Command parser relative MMIO addressing needs to be enabled when writing
to the register.

Signed-off-by: default avatarTvrtko Ursulin <tvrtko.ursulin@igalia.com>
Fixes: ca33cd27 ("drm/xe/xelp: Add Wa_18022495364")
Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: Matthew Brost <matthew.brost@intel.com>
Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: default avatarMatt Roper <matthew.d.roper@intel.com>
Link: https://patch.msgid.link/20260420131603.70357-1-tvrtko.ursulin@igalia.com


Signed-off-by: default avatarMatt Roper <matthew.d.roper@intel.com>
(cherry picked from commit 5627392001802a98ed6cf8cf79a303abd00d1c0f)
Signed-off-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
parent 3762d6c3

drivers/gpu/drm/xe/xe_lrc.c

+1 −1
Original line number Diff line number Diff line
@@ -1214,7 +1214,7 @@ static ssize_t setup_invalidate_state_cache_wa(struct xe_lrc *lrc, 
	if (xe_gt_WARN_ON(lrc->gt, max_len < 3))

		return -ENOSPC;



	*cmd++ = MI_LOAD_REGISTER_IMM | MI_LRI_NUM_REGS(1);

	*cmd++ = MI_LOAD_REGISTER_IMM | MI_LRI_LRM_CS_MMIO | MI_LRI_NUM_REGS(1);

	*cmd++ = CS_DEBUG_MODE2(0).addr;

	*cmd++ = REG_MASKED_FIELD_ENABLE(INSTRUCTION_STATE_CACHE_INVALIDATE);