Commit 49024134 authored by Geert Uytterhoeven's avatar Geert Uytterhoeven
Browse files

Merge tag 'renesas-r9a09g057-dt-binding-defs-tag3' into renesas-clk-for-v6.16

Renesas RZ/V2H USB2 and GBETH Clock DT Binding Definitions

USB2 and Gigabit Ethernet clock DT binding definitions for the Renesas
RZ/V2H (R9A09G057) SoC, shared by driver and DT source files.
parents ef224dd2 ad227dab
Loading
Loading
Loading
Loading
+4 −0
Original line number Diff line number Diff line
@@ -17,5 +17,9 @@
#define R9A09G057_CM33_CLK0			6
#define R9A09G057_CST_0_SWCLKTCK		7
#define R9A09G057_IOTOP_0_SHCLK			8
#define R9A09G057_USB2_0_CLK_CORE0		9
#define R9A09G057_USB2_0_CLK_CORE1		10
#define R9A09G057_GBETH_0_CLK_PTP_REF_I		11
#define R9A09G057_GBETH_1_CLK_PTP_REF_I		12

#endif /* __DT_BINDINGS_CLOCK_RENESAS_R9A09G057_CPG_H__ */