Commit e3741935 authored by James Clark's avatar James Clark Committed by Arnaldo Carvalho de Melo
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perf cs-etm: Sync coresight-pmu.h header with the kernel sources 



Update the header to pull in the changes from commit 3285c471
("coresight: Remove misleading definitions").

Signed-off-by: default avatarJames Clark <james.clark@linaro.org>
Requested-by: default avatarArnaldo Carvalho de Melo <acme@redhat.com>
Tested-by: default avatarLeo Yan <leo.yan@arm.com>
Cc: Adrian Hunter <adrian.hunter@intel.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Ian Rogers <irogers@google.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Jiri Olsa <jolsa@kernel.org>
Cc: John Garry <john.g.garry@oracle.com>
Cc: Leo Yan <leo.yan@linux.dev>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Mike Leach <mike.leach@arm.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Suzuki Poulouse <suzuki.poulose@arm.com>
Cc: Will Deacon <will@kernel.org>
Link: https://lore.kernel.org/r/557db631-aef8-43b1-9f45-fae75910ccb4@linaro.org


Signed-off-by: default avatarArnaldo Carvalho de Melo <acme@redhat.com>
parent 3c3b41e5

tools/include/linux/coresight-pmu.h

+0 −24
Original line number Diff line number Diff line
@@ -21,30 +21,6 @@ 
 */

#define CORESIGHT_LEGACY_CPU_TRACE_ID(cpu)  (0x10 + (cpu * 2))



/*

 * Below are the definition of bit offsets for perf option, and works as

 * arbitrary values for all ETM versions.

 *

 * Most of them are orignally from ETMv3.5/PTM's ETMCR config, therefore,

 * ETMv3.5/PTM doesn't define ETMCR config bits with prefix "ETM3_" and

 * directly use below macros as config bits.

 */

#define ETM_OPT_BRANCH_BROADCAST 8

#define ETM_OPT_CYCACC		12

#define ETM_OPT_CTXTID		14

#define ETM_OPT_CTXTID2		15

#define ETM_OPT_TS		28

#define ETM_OPT_RETSTK		29



/* ETMv4 CONFIGR programming bits for the ETM OPTs */

#define ETM4_CFG_BIT_BB         3

#define ETM4_CFG_BIT_CYCACC	4

#define ETM4_CFG_BIT_CTXTID	6

#define ETM4_CFG_BIT_VMID	7

#define ETM4_CFG_BIT_TS		11

#define ETM4_CFG_BIT_RETSTK	12

#define ETM4_CFG_BIT_VMID_OPT	15



/*

 * Interpretation of the PERF_RECORD_AUX_OUTPUT_HW_ID payload.

 * Used to associate a CPU with the CoreSight Trace ID.