Commit 23bd8c4a authored by Stephen Boyd's avatar Stephen Boyd
Browse files

Merge branches 'clk-imx', 'clk-qcom', 'clk-amlogic' and 'clk-mediatek' into clk-next 

* clk-imx:
  clk: imx: pll14xx: change naming of fvco to fout
  clk: imx: clk-imx8qxp: fix LVDS bypass, pixel and phy clocks
  clk: imx: scu: Fix memory leak in __imx_clk_gpr_scu()
  dt-bindings: clock: support i.MX93 ANATOP clock module

* clk-qcom: (41 commits)
  clk: qcom: dispcc-sm8650: Add test_ctl parameters to PLL config
  clk: qcom: gpucc-sm8650: Add test_ctl parameters to PLL config
  clk: qcom: dispcc-sm8550: Use the correct PLL configuration function
  clk: qcom: dispcc-sm8550: Update disp PLL settings
  clk: qcom: gpucc-sm8550: Update GPU PLL settings
  clk: qcom: gcc-sm8550: Mark RCGs shared where applicable
  clk: qcom: gcc-sm8550: use collapse-voting for PCIe GDSCs
  clk: qcom: gcc-sm8550: Mark the PCIe GDSCs votable
  clk: qcom: gcc-sm8550: Add the missing RETAIN_FF_ENABLE GDSC flag
  clk: qcom: camcc-sc8280xp: Prevent error pointer dereference
  clk: qcom: videocc-sm8150: Add runtime PM support
  clk: qcom: videocc-sm8150: Add missing PLL config property
  clk: qcom: videocc-sm8150: Update the videocc resets
  dt-bindings: clock: Update the videocc resets for sm8150
  clk: qcom: rpmh: Add support for X1E80100 rpmh clocks
  clk: qcom: Add Global Clock controller (GCC) driver for X1E80100
  dt-bindings: clock: qcom-rpmhcc: Add RPMHCC bindings for X1E80100
  dt-bindings: clock: qcom: Add X1E80100 GCC clocks
  clk: qcom: Add ECPRICC driver support for QDU1000 and QRU1000
  clk: qcom: branch: Add mem ops support for branch2 clocks
  ...

* clk-amlogic:
  clk: meson: g12a: add CSI & ISP gates clocks
  clk: meson: g12a: add MIPI ISP clocks
  dt-bindings: clock: g12a-clkc: add MIPI ISP & CSI PHY clock ids
  clk: meson: g12a: add CTS_ENCL & CTS_ENCL_SEL clocks
  dt-bindings: clk: g12a-clkc: add CTS_ENCL clock ids

* clk-mediatek:
  clk: mediatek: add drivers for MT7988 SoC
  clk: mediatek: add pcw_chg_bit control for PLLs of MT7988
  dt-bindings: clock: mediatek: add clock controllers of MT7988
  dt-bindings: reset: mediatek: add MT7988 ethwarp reset IDs
  dt-bindings: clock: mediatek: add MT7988 clock IDs
  clk: mediatek: mt8188-topckgen: Refactor parents for top_dp/edp muxes
  clk: mediatek: mt8195-topckgen: Refactor parents for top_dp/edp muxes
  clk: mediatek: clk-mux: Support custom parent indices for muxes
  dt-bindings: clock: brcm,kona-ccu: convert to YAML
  dt-bindings: arm: mediatek: move ethsys controller & convert to DT schema
  dt-bindings: Remove alt_ref from versal
parents 8066514d f1b59121 93beaa98 145916f6 4b471943

Documentation/devicetree/bindings/arm/mediatek/mediatek,ethsys.txt

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Mediatek ethsys controller

============================



The Mediatek ethsys controller provides various clocks to the system.



Required Properties:



- compatible: Should be:

	- "mediatek,mt2701-ethsys", "syscon"

	- "mediatek,mt7622-ethsys", "syscon"

	- "mediatek,mt7623-ethsys", "mediatek,mt2701-ethsys", "syscon"

	- "mediatek,mt7629-ethsys", "syscon"

	- "mediatek,mt7981-ethsys", "syscon"

	- "mediatek,mt7986-ethsys", "syscon"

- #clock-cells: Must be 1

- #reset-cells: Must be 1



The ethsys controller uses the common clk binding from

Documentation/devicetree/bindings/clock/clock-bindings.txt

The available clocks are defined in dt-bindings/clock/mt*-clk.h.



Example:



ethsys: clock-controller@1b000000 {

	compatible = "mediatek,mt2701-ethsys", "syscon";

	reg = <0 0x1b000000 0 0x1000>;

	#clock-cells = <1>;

	#reset-cells = <1>;

};

Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.yaml

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@@ -30,6 +30,7 @@ properties: 
              - mediatek,mt7629-infracfg

              - mediatek,mt7981-infracfg

              - mediatek,mt7986-infracfg

              - mediatek,mt7988-infracfg

              - mediatek,mt8135-infracfg

              - mediatek,mt8167-infracfg

              - mediatek,mt8173-infracfg

Documentation/devicetree/bindings/clock/brcm,kona-ccu.txt

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Broadcom Kona Family Clocks



This binding is associated with Broadcom SoCs having "Kona" style

clock control units (CCUs).  A CCU is a clock provider that manages

a set of clock signals.  Each CCU is represented by a node in the

device tree.



This binding uses the common clock binding:

    Documentation/devicetree/bindings/clock/clock-bindings.txt



Required properties:

- compatible

	Shall have a value of the form "brcm,<model>-<which>-ccu",

	where <model> is a Broadcom SoC model number and <which> is

	the name of a defined CCU.  For example:

	    "brcm,bcm11351-root-ccu"

	The compatible strings used for each supported SoC family

	are defined below.

- reg

	Shall define the base and range of the address space

	containing clock control registers

- #clock-cells

	Shall have value <1>.  The permitted clock-specifier values

	are defined below.

- clock-output-names

	Shall be an ordered list of strings defining the names of

	the clocks provided by the CCU.



Device tree example:



	slave_ccu: slave_ccu {

		compatible = "brcm,bcm11351-slave-ccu";

		reg = <0x3e011000 0x0f00>;

		#clock-cells = <1>;

		clock-output-names = "uartb",

				     "uartb2",

				     "uartb3",

				     "uartb4";

	};



	ref_crystal_clk: ref_crystal {

		#clock-cells = <0>;

		compatible = "fixed-clock";

		clock-frequency = <26000000>;

	};



	uart@3e002000 {

		compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";

		reg = <0x3e002000 0x1000>;

		clocks = <&slave_ccu BCM281XX_SLAVE_CCU_UARTB3>;

		interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;

		reg-shift = <2>;

		reg-io-width = <4>;

	};



BCM281XX family

---------------

CCU compatible string values for SoCs in the BCM281XX family are:

    "brcm,bcm11351-root-ccu"

    "brcm,bcm11351-aon-ccu"

    "brcm,bcm11351-hub-ccu"

    "brcm,bcm11351-master-ccu"

    "brcm,bcm11351-slave-ccu"



The following table defines the set of CCUs and clock specifiers for

BCM281XX family clocks.  When a clock consumer references a clocks,

its symbolic specifier (rather than its numeric index value) should

be used.  These specifiers are defined in:

    "include/dt-bindings/clock/bcm281xx.h"



    CCU     Clock           Type    Index   Specifier

    ---     -----           ----    -----   ---------

    root    frac_1m         peri      0     BCM281XX_ROOT_CCU_FRAC_1M



    aon     hub_timer       peri      0     BCM281XX_AON_CCU_HUB_TIMER

    aon     pmu_bsc         peri      1     BCM281XX_AON_CCU_PMU_BSC

    aon     pmu_bsc_var     peri      2     BCM281XX_AON_CCU_PMU_BSC_VAR



    hub     tmon_1m         peri      0     BCM281XX_HUB_CCU_TMON_1M



    master  sdio1           peri      0     BCM281XX_MASTER_CCU_SDIO1

    master  sdio2           peri      1     BCM281XX_MASTER_CCU_SDIO2

    master  sdio3           peri      2     BCM281XX_MASTER_CCU_SDIO3

    master  sdio4           peri      3     BCM281XX_MASTER_CCU_SDIO4

    master  dmac            peri      4     BCM281XX_MASTER_CCU_DMAC

    master  usb_ic          peri      5     BCM281XX_MASTER_CCU_USB_IC

    master  hsic2_48m       peri      6     BCM281XX_MASTER_CCU_HSIC_48M

    master  hsic2_12m       peri      7     BCM281XX_MASTER_CCU_HSIC_12M



    slave   uartb           peri      0     BCM281XX_SLAVE_CCU_UARTB

    slave   uartb2          peri      1     BCM281XX_SLAVE_CCU_UARTB2

    slave   uartb3          peri      2     BCM281XX_SLAVE_CCU_UARTB3

    slave   uartb4          peri      3     BCM281XX_SLAVE_CCU_UARTB4

    slave   ssp0            peri      4     BCM281XX_SLAVE_CCU_SSP0

    slave   ssp2            peri      5     BCM281XX_SLAVE_CCU_SSP2

    slave   bsc1            peri      6     BCM281XX_SLAVE_CCU_BSC1

    slave   bsc2            peri      7     BCM281XX_SLAVE_CCU_BSC2

    slave   bsc3            peri      8     BCM281XX_SLAVE_CCU_BSC3

    slave   pwm             peri      9     BCM281XX_SLAVE_CCU_PWM





BCM21664 family

---------------

CCU compatible string values for SoCs in the BCM21664 family are:

    "brcm,bcm21664-root-ccu"

    "brcm,bcm21664-aon-ccu"

    "brcm,bcm21664-master-ccu"

    "brcm,bcm21664-slave-ccu"



The following table defines the set of CCUs and clock specifiers for

BCM21664 family clocks.  When a clock consumer references a clocks,

its symbolic specifier (rather than its numeric index value) should

be used.  These specifiers are defined in:

    "include/dt-bindings/clock/bcm21664.h"



    CCU     Clock           Type    Index   Specifier

    ---     -----           ----    -----   ---------

    root    frac_1m         peri      0     BCM21664_ROOT_CCU_FRAC_1M



    aon     hub_timer       peri      0     BCM21664_AON_CCU_HUB_TIMER



    master  sdio1           peri      0     BCM21664_MASTER_CCU_SDIO1

    master  sdio2           peri      1     BCM21664_MASTER_CCU_SDIO2

    master  sdio3           peri      2     BCM21664_MASTER_CCU_SDIO3

    master  sdio4           peri      3     BCM21664_MASTER_CCU_SDIO4

    master  sdio1_sleep     peri      4     BCM21664_MASTER_CCU_SDIO1_SLEEP

    master  sdio2_sleep     peri      5     BCM21664_MASTER_CCU_SDIO2_SLEEP

    master  sdio3_sleep     peri      6     BCM21664_MASTER_CCU_SDIO3_SLEEP

    master  sdio4_sleep     peri      7     BCM21664_MASTER_CCU_SDIO4_SLEEP



    slave   uartb           peri      0     BCM21664_SLAVE_CCU_UARTB

    slave   uartb2          peri      1     BCM21664_SLAVE_CCU_UARTB2

    slave   uartb3          peri      2     BCM21664_SLAVE_CCU_UARTB3

    slave   uartb4          peri      3     BCM21664_SLAVE_CCU_UARTB4

    slave   bsc1            peri      4     BCM21664_SLAVE_CCU_BSC1

    slave   bsc2            peri      5     BCM21664_SLAVE_CCU_BSC2

    slave   bsc3            peri      6     BCM21664_SLAVE_CCU_BSC3

    slave   bsc4            peri      7     BCM21664_SLAVE_CCU_BSC4

Documentation/devicetree/bindings/clock/brcm,kona-ccu.yaml

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# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause

%YAML 1.2

---

$id: http://devicetree.org/schemas/clock/brcm,kona-ccu.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Broadcom Kona family clock control units (CCU)



maintainers:

  - Florian Fainelli <florian.fainelli@broadcom.com>

  - Ray Jui <rjui@broadcom.com>

  - Scott Branden <sbranden@broadcom.com>



description: |

  Broadcom "Kona" style clock control unit (CCU) is a clock provider that

  manages a set of clock signals.



  All available clock IDs are defined in

  - include/dt-bindings/clock/bcm281xx.h for BCM281XX family

  - include/dt-bindings/clock/bcm21664.h for BCM21664 family



properties:

  compatible:

    enum:

      - brcm,bcm11351-aon-ccu

      - brcm,bcm11351-hub-ccu

      - brcm,bcm11351-master-ccu

      - brcm,bcm11351-root-ccu

      - brcm,bcm11351-slave-ccu

      - brcm,bcm21664-aon-ccu

      - brcm,bcm21664-master-ccu

      - brcm,bcm21664-root-ccu

      - brcm,bcm21664-slave-ccu



  reg:

    maxItems: 1



  '#clock-cells':

    const: 1



  clock-output-names:

    minItems: 1

    maxItems: 10



required:

  - compatible

  - reg

  - '#clock-cells'

  - clock-output-names



allOf:

  - if:

      properties:

        compatible:

          contains:

            const: brcm,bcm11351-aon-ccu

    then:

      properties:

        clock-output-names:

          items:

            - const: hub_timer

            - const: pmu_bsc

            - const: pmu_bsc_var

  - if:

      properties:

        compatible:

          contains:

            const: brcm,bcm11351-hub-ccu

    then:

      properties:

        clock-output-names:

          const: tmon_1m

  - if:

      properties:

        compatible:

          contains:

            const: brcm,bcm11351-master-ccu

    then:

      properties:

        clock-output-names:

          items:

            - const: sdio1

            - const: sdio2

            - const: sdio3

            - const: sdio4

            - const: usb_ic

            - const: hsic2_48m

            - const: hsic2_12m

  - if:

      properties:

        compatible:

          contains:

            enum:

              - brcm,bcm11351-root-ccu

              - brcm,bcm21664-root-ccu

    then:

      properties:

        clock-output-names:

          const: frac_1m

  - if:

      properties:

        compatible:

          contains:

            const: brcm,bcm11351-slave-ccu

    then:

      properties:

        clock-output-names:

          items:

            - const: uartb

            - const: uartb2

            - const: uartb3

            - const: uartb4

            - const: ssp0

            - const: ssp2

            - const: bsc1

            - const: bsc2

            - const: bsc3

            - const: pwm

  - if:

      properties:

        compatible:

          contains:

            const: brcm,bcm21664-aon-ccu

    then:

      properties:

        clock-output-names:

          const: hub_timer

  - if:

      properties:

        compatible:

          contains:

            const: brcm,bcm21664-master-ccu

    then:

      properties:

        clock-output-names:

          items:

            - const: sdio1

            - const: sdio2

            - const: sdio3

            - const: sdio4

            - const: sdio1_sleep

            - const: sdio2_sleep

            - const: sdio3_sleep

            - const: sdio4_sleep

  - if:

      properties:

        compatible:

          contains:

            const: brcm,bcm21664-slave-ccu

    then:

      properties:

        clock-output-names:

          items:

            - const: uartb

            - const: uartb2

            - const: uartb3

            - const: bsc1

            - const: bsc2

            - const: bsc3

            - const: bsc4



additionalProperties: false



examples:

  - |

    clock-controller@3e011000 {

      compatible = "brcm,bcm11351-slave-ccu";

      reg = <0x3e011000 0x0f00>;

      #clock-cells = <1>;

      clock-output-names = "uartb",

                           "uartb2",

                           "uartb3",

                           "uartb4",

                           "ssp0",

                           "ssp2",

                           "bsc1",

                           "bsc2",

                           "bsc3",

                           "pwm";

    };

...

Documentation/devicetree/bindings/clock/fsl,imx93-anatop.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/clock/fsl,imx93-anatop.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: NXP i.MX93 ANATOP Clock Module



maintainers:

  - Peng Fan <peng.fan@nxp.com>



description: |

  NXP i.MX93 ANATOP module which contains PLL and OSC to Clock Controller

  Module.



properties:

  compatible:

    items:

      - const: fsl,imx93-anatop



  reg:

    maxItems: 1



  '#clock-cells':

    const: 1



required:

  - compatible

  - reg

  - '#clock-cells'



additionalProperties: false



examples:

  - |

    clock-controller@44480000 {

        compatible = "fsl,imx93-anatop";

        reg = <0x44480000 0x2000>;

        #clock-cells = <1>;

    };



...